ADC0801S040TS/C1:1 NXP Semiconductors, ADC0801S040TS/C1:1 Datasheet - Page 8

• Manufacturer Part Number: ADC0801S040TS/C1:1
• Description: IC ADC 8BIT PAR 40MHZ 20-SSOP
• Manufacturer: NXP Semiconductors

Specifications of ADC0801S040TS/C1:1

• Number Of Bits: 8
• Sampling Rate (per Second): 40M
• Number Of Converters: 1
• Power Dissipation (max): 53mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -20°C ~ 75°C
• Mounting Type: Surface Mount
• Package / Case: 20-LSSOP (0.173", 4.4mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4420; 568-4420-5; 568-4420-5; 935286583151; ADC0801S040TS/C1; ADC0801S040TS/C1-S

NXP Semiconductors
Table 6.
V
= 1.84 V; C
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
ADC0801S040_2
Product data sheet
Symbol
Differential phase
Timing (f
t
t
t
3-state output delay times; see
t
t
t
t
d(s)
h(o)
d(o)
dHZ
dZL
dZH
dLZ
DDA
dif
In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock must not be less
than 1 ns.
Analog input voltages producing code 0 up to and including code 255:
a) V
b) V
To ensure the optimum linearity performance of such a converter architecture the lower and upper extremities of the converter reference
resistor ladder are connected to pins RB and RT via offset resistors R
a) The current flowing into the resistor ladder is
b) Since R
The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device. No glitches greater
than 2 LSB, nor any significant attenuation is observed in the reconstructed signal.
The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale input (square
wave signal) in order to sample the signal and obtain correct output data.
Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8000 acquisition points per equivalent fundamental
period. The calculation takes into account all harmonics and noise up to half of the clock frequency (Nyquist frequency). Conversion to
signal-to-noise ratio: S/N = ENOB
Measurement carried out using video analyzer VM700A, where video analog signal is reconstructed through a DAC.
Output data acquisition: the output data is available after the maximum delay time of t
= V5 to V6 = 3.3 V; V
(V
to code 255 at T
to 255 is
will be kept reasonably constant from device to device. Consequently variation of the output codes at a given input voltage depends
mainly on the difference V
parallel and fed with the same reference source, the matching between each of them is optimized.
offset
offset
RB
clk
L
) at T
Characteristics
= 20 pF; T
= 40 MHz; C
BOTTOM is the difference between the analog input which produces data equal to 00 and the reference voltage on pin RB
TOP is the difference between the reference voltage on pin RT (V
Parameter
differential phase
sampling delay time
output hold time
output delay time
active HIGH to float
delay time
float to active LOW delay
time
float to active HIGH
delay time
active LOW to float delay
time
L
, R
V
amb
I
[7]
OB
=
= 25 C.
and R
R
amb
amb
L
= 25 C
L
OT
DDD
I
= 0 C to 70 C; typical values measured at T
= 20 pF); see
L
have similar behavior with respect to process and temperature variation, the ratio
…continued
=
= V3 to V4 = 3.3 V; V
RT
.
--------------------------------------- -
R
OB
Figure 5
V
RB
+
6.02 + 1.76 dB.
R
R
and its variation with temperature and supply voltage. When several ADCs are connected in
L
L
Conditions
PAL modulated ramp
V
V
V
+
Figure 4
DDO
DDO
DDO
R
OT
= 4.75 V
= 3.15 V
= 2.7 V
I
=
Rev. 02 — 18 August 2008
[8]
V
DDO
--------------------------------------- -
R
RT
OB
V
= V20 to V11 = 3.3 V; V
+
RT
+
V
R
RB
–
L
V
+
RB
=
R
OT
0.838
OB
and the full-scale input range at the converter, to cover code 0
and R
RT
amb
) and the analog input which produces data outputs equal
Min
-
-
5
8
8
8
-
-
-
-
V
OT
RT
= 25 C unless otherwise specified.
as shown in
SSA
–
d(o)
V
, V
RB
.
SSD
Single 8 bits ADC, up to 40 MHz
Typ
0.25
-
12
17
18
14
16
16
14
Figure
and V
-
ADC0801S040
3.
SSO
shorted together; V
Max
-
5
-
15
20
21
18
20
20
18
--------------------------------------- -
R
OB
© NXP B.V. 2008. All rights reserved.
+
R
R
L
L
+
R
OT
Unit
deg
ns
ns
ns
ns
ns
ns
ns
ns
ns
i(a)(p-p)
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