LTC2259CUJ-16#PBF Linear Technology, LTC2259CUJ-16#PBF Datasheet - Page 21
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LTC2259CUJ-16#PBF
Manufacturer Part Number
LTC2259CUJ-16#PBF
Description
IC ADC 16BIT 80MSPS 40QFN
Manufacturer
Linear Technology
Datasheet
1.LTC2259CUJ-16TRPBF.pdf
(28 pages)
Specifications of LTC2259CUJ-16#PBF
Number Of Bits
16
Sampling Rate (per Second)
80M
Data Interface
Serial, Parallel
Number Of Converters
1
Power Dissipation (max)
201mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
40-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APPLICATIONS INFORMATION
Serial Programming Mode
To use the serial programming mode, PAR/SER should be
tied to ground. The CS, SCK, SDI and SDO pins become
a serial interface that program the A/D mode control
registers. Data is written to a register with a 16-bit serial
word. Data can also be read back from a register to verify
its contents.
Serial data transfer starts when CS is taken low. The data
on the SDI pin is latched at the fi rst 16 rising edges of
SCK. Any SCK rising edges after the fi rst 16 are ignored.
The data transfer ends when CS is taken high again.
The fi rst bit of the 16-bit input word is the R/W bit. The
next seven bits are the address of the register (A6:A0).
The fi nal eight bits are the register data (D7:D0).
If the R/W bit is low, the serial data (D7:D0) will be writ-
ten to the register set by the address bits (A6:A0). If the
R/W bit is high, data in the register set by the address bits
(A6:A0) will be read back on the SDO pin (see the timing
Table 3. Serial Programming Mode Register Map
REGISTER A0: RESET REGISTER (ADDRESS 00h)
REGISTER A1: POWER-DOWN REGISTER (ADDRESS 01h)
Bit 7
Bits 6-0
Bits 7-2
Bits 1-0
RESET
D7
D7
X
RESET
0 = Not Used
1 = Software Reset. All mode control registers are reset to 00h. This bit is automatically set back to zero after the reset is complete.
Unused, Don’t Care Bits.
Unused, Don’t Care Bits.
PWROFF1:PWROFF0
00 = Normal Operation
01 = Nap Mode
10 = Not Used
11 = Sleep Mode
D6
D6
X
X
Software Reset Bit
D5
D5
X
X
Power-Down Control Bits
D4
D4
X
X
diagrams). During a read back command the register is
not updated and data on SDI is ignored.
The SDO pin is an open-drain output that pulls to ground
with a 200Ω impedance. If register data is read back
through SDO, an external 2k pull-up resistor is required.
If serial data is only written and read back is not needed,
then SDO can be left fl oating and no pull-up resistor is
needed.
Table 3 shows a map of the mode control registers.
Software Reset
If serial programming is used, the mode control registers
should be programmed as soon as possible after the power
supplies turn on and are stable. The fi rst serial command
must be a software reset which will reset all register data
bits to logic 0. To perform a software reset, bit D7 in the
reset register is written with a logic 1. After the reset is
complete, bit D7 is automatically set back to zero.
D3
D3
X
X
D2
D2
X
X
PWROFF1
LTC2259-16
D1
D1
X
PWROFF0
D0
D0
X
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