LTC2259CUJ-16#PBF Linear Technology, LTC2259CUJ-16#PBF Datasheet - Page 13
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LTC2259CUJ-16#PBF
Manufacturer Part Number
LTC2259CUJ-16#PBF
Description
IC ADC 16BIT 80MSPS 40QFN
Manufacturer
Linear Technology
Datasheet
1.LTC2259CUJ-16TRPBF.pdf
(28 pages)
Specifications of LTC2259CUJ-16#PBF
Number Of Bits
16
Sampling Rate (per Second)
80M
Data Interface
Serial, Parallel
Number Of Converters
1
Power Dissipation (max)
201mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
40-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS INFORMATION
CONVERTER OPERATION
The LTC2259-16 is a low power 16-bit 80Msps A/D
converter that is powered by a single 1.8V supply. The
analog inputs should be driven differentially. The encode
input can be driven differentially, or single ended for lower
power consumption. The digital outputs can be CMOS,
double-data rate CMOS (to halve the number of output
lines), or double-data rate LVDS (to reduce digital noise
in the system.) Many additional features can be chosen by
programming the mode control registers through a serial
SPI port. See the Serial Programming Mode section.
ANALOG INPUT
The analog input is a differential CMOS sample-and-hold
circuit (Figure 2). The inputs should be driven differentially
around a common mode voltage set by the V
pin, which is nominally V
inputs should swing from V
should be 180° phase difference between the inputs.
SENSE
0.1μF
1μF
V
A
A
V
REF
IN
IN
CM
+
–
INPUT
REFERENCE
S/H
SELECT
RANGE
1.25V
V
DD
/2
REF
BUF
DD
FIRST PIPELINED
CM
/2. For the 2V input range, the
ADC STAGE
– 0.5V to V
DIFF
AMP
REF
SECOND PIPELINED
CM
ADC STAGE
0.1μF
REFH
Figure 1. Functional Block Diagram
+ 0.5V. There
REFH
CM
0.1μF
2.2μF
output
REFL
THIRD PIPELINED
REFL
ADC STAGE
0.1μF
INTERNAL CLOCK SIGNALS
CLOCK/DUTY
ENC
CONTROL
CYCLE
+
ENC
ENC
A
A
ENC
IN
IN
+
–
+
–
–
FOURTH PIPELINED
ADC STAGE
LTC2259-16
PAR/SER
10Ω
10Ω
1.2V
1.2V
10k
10k
V
Figure 2. Equivalent Input Circuit
CS
REGISTERS
DD
CONTROL
MODE
SCK
V
DD
FIFTH PIPELINED
SDI
V
ADC STAGE
DD
SDO
C
1.8pF
C
1.8pF
PARASITIC
PARASITIC
AND CORRECTION
SHIFT REGISTER
DRIVERS
OUTPUT
LTC2259-16
OGND
225916 F01
R
25Ω
R
25Ω
ON
ON
•
•
•
C
C
OV
SAMPLE
SAMPLE
GND
D15
D0
CLKOUT
CLKOUT
3.5pF
3.5pF
V
DD
DD
13
225916 F02
+
–
225916f