LTC2222IUK-11#TRPBF Linear Technology, LTC2222IUK-11#TRPBF Datasheet
LTC2222IUK-11#TRPBF
Specifications of LTC2222IUK-11#TRPBF
Related parts for LTC2222IUK-11#TRPBF
LTC2222IUK-11#TRPBF Summary of contents
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... PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. 3. ...
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... PLASTIC QFN EXPOSED PAD IS GND (PIN 49), ORDER PART NUMBER LTC2222CUK-11 LTC2222IUK-11 Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: Consult LTC Marketing for parts specified with wider operating temperature ranges. ...
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ALOG I PUT The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are 25°C. (Note 4) A SYMBOL PARAMETER V Analog Input Range ( Analog ...
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LTC2222- TER AL REFERE CE CHARACTERISTICS PARAMETER V Output Voltage CM V Output Tempco CM V Line Regulation CM V Output Resistance DIGITAL I PUTS A D DIGITAL OUTPUTS full operating temperature range, ...
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W U POWER REQUIRE E TS range, otherwise specifications are at T SYMBOL PARAMETER V Analog Supply Voltage DD OV Output Supply Voltage DD I Analog Supply Current VDD P Power Dissipation DISS P Shutdown Power SHDN P Nap Mode ...
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LTC2222- TYPICAL PERFOR A CE CHARACTERISTICS INL, 2V Range 1.0 0.8 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 – 1.0 1024 1536 0 512 2048 OUTPUT CODE 222211 G01 SNR vs Input Frequency, ...
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W U TYPICAL PERFOR A CE CHARACTERISTICS SFDR and SNR vs Sample Rate, 2V Range 30MHz, –1dB IN 90 SFDR SNR 100 120 SAMPLE RATE (Msps) 222211 ...
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LTC2222- TYPICAL PERFOR A CE CHARACTERISTICS 8192 Point FFT 5MHz, –1dB, 2V Range IN 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY (MHz) 8192 ...
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CTIO (Pin 1): Positive Differential Analog Input – (Pin 2): Negative Differential Analog Input. IN REFHA (Pins 3, 4): ADC High Reference. Bypass to Pins 5, 6 with 0.1µF ceramic ...
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LTC2222- FUNCTIONAL BLOCK DIAGRA + A IN INPUT FIRST PIPELINED S/H ADC STAGE – 1.6V CM REFERENCE 2.2µF RANGE SELECT REF SENSE BUF 10 W SECOND PIPELINED THIRD PIPELINED ADC STAGE ADC STAGE REFH REFL ...
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DIAGRA S ANALOG N INPUT – ENC + ENC D0-D10, OF CLOCKOUT OE DATA Timing Diagram – ...
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LTC2222- APPLICATIO S I FOR ATIO DYNAMIC PERFORMANCE Signal-to-Noise Plus Distortion Ratio The signal-to-noise plus distortion ratio [S/(N + D)] is the ratio between the RMS amplitude of the fundamental input frequency and the RMS amplitude of all ...
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U U APPLICATIO S I FOR ATIO CONVERTER OPERATION As shown in Figure 1, the LTC2222- CMOS pipelined multistep converter. The converter has five pipelined ADC stages; a sampled analog input will result in a digitized value five ...
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LTC2222- APPLICATIO S I FOR ATIO During the sample phase when ENC is low, the transistors connect the analog inputs to the sampling capacitors and they charge to, and track the differential input voltage. When ENC transitions from ...
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U U APPLICATIO S I FOR ATIO signal at its optimum DC level. Figure 3 shows a 1:1 turns ratio transformer. Other turns ratios can be used if the source impedance seen by the ADC does not exceed 100Ω for ...
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LTC2222- APPLICATIO S I FOR ATIO 0.1µF 12Ω ANALOG INPUT 0.1µF 25Ω T1 0.1µF 25Ω 12Ω MA/COM ETC1-1-13 RESISTORS, CAPACITORS ARE 0402 PACKAGE SIZE Figure 6. Recommended Front End Circuit for Input Frequencies Between 100MHz and ...
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U U APPLICATIO S I FOR ATIO Input Range The input range can be set based on the application. The 2V input range will provide the best signal-to-noise perfor- mance while maintaining excellent SFDR. The 1V input range will have ...
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LTC2222- APPLICATIO S I FOR ATIO DIGITAL OUTPUTS Digital Output Buffers Figure 13 shows an equivalent circuit for a single output buffer. Each buffer is powered by OV are isolated from the ADC power and ground. The addi- ...
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U U APPLICATIO S I FOR ATIO to the same power supply as for the logic being driven. For example if the converter is driving a DSP powered by a 1.8V supply then OV should be tied to that same ...
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LTC2222- APPLICATIO S I FOR ATIO R19 R1* C1 OPT 0.1µF T1* R2 ANALOG 24.9k INPUT J1 C2* R4 24.9k C3 0.1µF R6 50Ω 0.1µ 1µF ...
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U U APPLICATIO S I FOR ATIO Layer 1 Component Side W U Silkscreen Top LTC2222-11 Layer 2 GND Plane 222211f 21 ...
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LTC2222- APPLICATIO S I FOR ATIO Layer 3 Power Plane Layer 4 Bottom Side 222211f ...
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... PIN 1 TOP MARK (SEE NOTE 6) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights Package 48-Lead Plastic QFN (7mm × ...
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... DC to 3GHz, 21dBm IIP3, Integrated LO Buffer 450MHz 1dB BW, 47dB OIP3, Digital Gain Control 10.5dB to 33dB in 1.5dB/Step 4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz 12.5dB, 50Ω Single-Ended RF and LO Ports www.linear.com ● 222211f LT/TP 0805 500 • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2005 ...