LTC1278-4CSW Linear Technology, LTC1278-4CSW Datasheet
LTC1278-4CSW
Specifications of LTC1278-4CSW
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LTC1278-4CSW Summary of contents
Page 1
... Instant wake-up from shut- down allows the converter to be powered down even during brief inactive periods. The LTC1278 converts unipolar inputs from a single 5V supply and 2.5V bipolar inputs from 5V supplies. Maximum DC specs include 1LSB INL and 1LSB DNL. Outstanding guaranteed AC performance includes 70dB S/( and 78dB THD at the input frequency of 100kHz over temperature ...
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... High Between Conversions (Sample Mode) During Conversions (Hold Mode ORDER TOP VIEW PART NUMBER LTC1278-4CN 3 22 BUSY LTC1278-5CN LTC1278-4IN 6 19 CONVST LTC1278-4CSW 7 18 SHDN LTC1278-5CSW LTC1278-4ISW PACKAGE 24-LEAD PLASTIC SO WIDE = 110 C, = 100 C/W ( 110 C, = 130 C/W (SW) JA LTC1278-4/LTC1278-5 MIN TYP MAX ...
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... DD LTC1278 LTC1278-4/LTC1278-5 MIN TYP – 80 – 74 – 84 – 74 – 82 – 350 (Note 5) LTC1278-4/LTC1278-5 MIN TYP MAX 2.400 2.420 2.440 10 0.01 0.01 2 (Note 5) LTC1278-4/LTC1278-5 MIN TYP MAX 2.4 5 4.7 4 0.05 0.10 – MAX UNITS dB dB – – MHz kHz UNITS V 45 ppm/ C ...
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... Bipolar Bipolar Only f = 500ksps SAMPLE SHDN = 500ksps – 5V SAMPLE 500ksps SAMPLE SHDN = 0V (Note 5) CONDITIONS LTC1278-4 LTC1278-5 LTC1278-4 LTC1278-5 LTC1278-4 LTC1278-5 (Notes 9, 10) (Notes 9, 10) (Note 10) (Notes 10, 12 100pF L Commercial Industrial C = 100pF L Mode 2, (see Figure 14) (Note 20pF (Note 9) L Commercial Industrial C = 100pF L ...
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... SS without latch-up. These pins are not clamped to V Note 5V – 5V for bipolar mode 400kHz (LTC1278-4), 500kHz (LTC1278-5 specified. Note 6: Linearity, offset and full-scale specifications apply for unipolar and bipolar modes TYPICAL PERFORMANCE CHARACTERISTICS Integral Nonlinearity vs Output Code 1.0 f ...
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... 10mV) SS RIPPLE –60 DGND (V = 0.1V) RIPPLE – 1mV) DD RIPPLE –100 –120 1k 10k 100k 1M RIPPLE FREQUENCY (Hz) LTC1278 G7 Distortion vs Input Frequency 500kHz SAMPLE –10 –20 –30 –40 –50 –60 2ND HARMONIC –70 –80 THD 3RD HARMONIC –90 –100 10k 100k 1M 2M INPUT FREQUENCY (Hz) ...
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... Positive Supply, 5V. Bypass to AGND DD pin. (10 F tantalum in parallel with 0.1 F ceramic SAMPLE ZEROING SWITCH COMPARATOR 12-BIT CAPACITIVE DAC 12 12 SUCCESSIVE APPROXIMATION REGISTER CONTROL LOGIC SHDN CONVST RD CS BUSY LTC1278 (0V FOR UNIPOLAR MODE OR –5V FOR BIPOLAR MODE) D11 • OUTPUT LATCHES • • D0 LTC1278 • ...
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... U U APPLICATIONS INFORMATION CONVERSION DETAILS The LTC1278 uses a successive approximation algorithm and an internal sample-and-hold circuit to convert an analog signal to a 12-bit parallel output. The ADC is complete with a precision reference and an internal clock. The control logic provides easy interface to microproces- sors and DSPs. (Please refer to the Digital Interface section for the data format ...
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... N = [S/( – 1.76]/6.02 where N is the Effective Number of Bits of resolution and S/( expressed in dB. At the maximum sampling rate of 500kHz the LTC1278 maintains very good ENOBs up to the Nyquist input frequency of 250kHz. Refer to Figure 3. Figure 3. Effective Bits and Signal-to-Noise + Distortion vs Input Frequency ...
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... Nyquist. Driving the Analog Input The analog input of the LTC1278 is easy to drive. It draws only one small current spike while charging the sample- and-hold capacitor at the end of conversion. During con- version the analog input draws no current. The only ...
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... Figure 7 shows a typical reference, the LT1019A-2.5 connected to the LTC1278. This will provide an improved drift (equal to the maximum 5ppm the LT1019A-2.5) and a 2.582V full scale. ...
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... A IN LTC1278 AGND LTC1278 F9a Figure 9c. LTC1278 Bipolar Offset and Full-Scale Adjust Circuit driving the analog input of the LTC1278 while the input A IN voltage is 1/2LSB below ground. This is done by applying an input voltage of – 0.61mV (– 0.5LSB) to the input in LTC1278 Figure 9c and adjusting the R8 until the ADC output code flickers between 0000 0000 0000 and 1111 1111 1111 ...
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... Power Shutdown The LTC1278 provides a shutdown feature that will save power when the ADC is in inactive periods. To power down the ADC, Pin 18 (SHDN) needs to be driven low. When in power shutdown mode, the LTC1278 will not start a conversion even though the CONVST goes low ...
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... After the conversion is complete, the processor can read the new result (which will initiate another conversion). t CONV t 4 SAMPLE N SAMPLE DATA (N-1) DATA N DB11 TO DB0 DB11 TO DB0 t CONV SAMPLE N SAMPLE DATA N DB11 TO DB0 DATA ( DB11 TO DB0 LTC1278 F12 ) DATA ( DB11 TO DB0 LTC1278 F13 ) ...
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... DATA N DB11 TO DB0 t CONV SAMPLE DATA N DB11 TO DB0 Figure 15. Slow Memory Mode t CONV SAMPLE DATA (N – 1) DB11 TO DB0 Figure 16. ROM Mode Timing LTC1278 DATA ( DB11 TO DB0 LTC1278 F14 DATA N DATA ( DB11 TO DB0 DB11-DB0 LTC1278 F15 DATA N DB11 TO DB0 LTC1278 F16 15 ...
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... LTC1278 PACKAGE DESCRIPTIO 0.300 – 0.325 (7.620 – 8.255) 0.009 – 0.015 (0.229 – 0.381) +0.035 0.325 –0.015 +0.889 8.255 –0.381 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) 0.291 – 0.299** (7.391 – 7.595) 0.093 – ...