LTC1198-2BCS8 Linear Technology, LTC1198-2BCS8 Datasheet
LTC1198-2BCS8
Specifications of LTC1198-2BCS8
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LTC1198-2BCS8 Summary of contents
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... They are offered in 8-pin SO packages and operate supplies. Power dissipation is only 10mW with a 3V supply or 50mW with a 5V supply. The LTC1198 automatically powers down to a typical supply current of 1nA whenever it is not performing conversions. These 8-bit switched-capacitor successive approximation ADCs include sample-and- holds. The LTC1196 has a differential analog input ...
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... LTC1198-1BCS8#TRPBF LTC1198-2ACS8#PBF LTC1198-2ACS8#TRPBF LTC1198-2BCS8#PBF LTC1198-2BCS8#TRPBF Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based fi nish parts. For more information on lead free part marking, go to: For more information on tape and reel specifi cations, go to: ...
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... LTC1198 20 LTC1198 40% CLK CLK(MAX 40% CLK CLK(MAX) 25 LTC1196 11 LTC1198 15 LTC1196-1A/LTC1196-2A LTC1198-1A/LTC1198-2A CONDITIONS MIN (Note LTC1196 5.000V REF LTC1198 5.000V CC LTC1196 l (Note 5) CONDITIONS V = 5.25V 4.75V 4.75V 10μ 4.75V 360μ LTC1196/LTC1198 The l denotes the specifi cations which apply over LTC1196-1 LTC1196-2 ...
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... A CONDITIONS V = 4.75V 1.6mA HIGH OUT OUT SMPL SMPL(MAX LTC1198 (Shutdown LTC1196 LTC1196/LTC1198 SMPL SMPL(MAX) The l denotes the specifi cations which apply over the full operating temperature range defi ned in Recommended Operating Conditions, CC REF CLK CLK(MAX) CONDITIONS MIN 500kHz/1MHz Input Signal ...
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... LTC1196 12 LTC1198 16 2 LTC1198 40 LTC1198 40% CLK CLK(MAX 40% CLK CLK(MAX) 50 LTC1196 11 LTC1198 15 LTC1196-1A/LTC1196-2A LTC1198-1A/LTC1198-2A CONDITIONS MIN (Note LTC1196 2.5.000V REF LTC1198 2.700V CC LTC1196 l (Note 5) = 25° CONDITIONS 2.7V 10μ 2.7V 360μ 2.7V 400μ HIGH LTC1196/LTC1198 The l denotes the specifi cations which apply over = 2 ...
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... Exposure to any Absolute 6 = 25° CONDITIONS OUT OUT SMPL SMPL(MAX 3.3V, LTC1198 (Shutdown 3.3V, LTC1196 LTC1196/LTC1198 SMPL SMPL(MAX) The l denotes the specifi cations which apply over the full operating temperature range, = 2.7V 2.5V REF CLK ...
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... 1.4 f CLK 1.2 1.0 0.8 0.6 0.4 0.2 0 125 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 REFERENCE VOLTAGE (V) LTC1196/LTC1198 Supply Current vs Sample Rate 10 LT1196 LT1196 V = 2.7V CC LT1198 0.1 CC LT1198 V 0.01 0.001 5.5 6.0 100 1k 10k SAMPLE RATE (Hz) 1196/98 G02 Offset vs Supply Voltage 0 ...
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... LTC1196/LTC1198 TYPICAL PERFORMANCE CHARACTERISTICS Linearity Error vs Reference Voltage 1 25° 12MHz CLK 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 REFERENCE VOLTAGE (V) 1196/98 G07 Gain vs Supply Voltage 0 25° 3MHz ...
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... CODE 1196/98 G20 Effective Bits and S/( Input Frequency 2.7V CC REF 383kHz (LTC1196) SMPL f = 287kHz (LTC1198) SMPL REF f = 1MHz (LTC1196) SMPL 750kHz (LTC1198) SMPL 25° 10k 100k INPUT FREQUENCY (Hz) 1196/98 G23 = 2. 120 100 140 1196/98 G18 192 224 256 1196/98 G21 1196/98 G24 ...
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... LTC1196/LTC1198 TYPICAL PERFORMANCE CHARACTERISTICS 4096 Point FFT Plot – 29kHz 882kHz SMPL –20 –30 –40 –50 –60 –70 –80 –90 –100 0 100 200 300 400 FREQUENCY (kHz) 1196/98 G25 Power Supply Feedthrough vs Ripple Frequency 25° 20mV) CC RIPPLE – 12MHz CLK –20 – ...
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... G34 LTC1198 CS/SHUTDOWN (Pin 1): Chip Select Input. A logic LOW on this input enables the LTC1198. A logic HIGH on this input disables the LTC1198 and disconnects the power to THE LTC1198. CHO (Pin 2): Analog Input. This input must be free of noise with respect to GND. ...
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... LTC1196/LTC1198 BLOCK DIAGRAM + IN (CH0) – IN (CH1) PIN NAMES IN PARENTHESES REFER TO THE LTC1198 TEST CIRCUITS On and Off Channel Leakage Current OFF A • • • • POLARITY Voltage Waveform for D Rise and Fall Times, t OUT D OUT (CS/SHUTDOWN REF BIAS AND SHUTDOWN CIRCUIT C SMPL – ...
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... THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL. NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL. Voltage Waveforms for Voltage Waveforms for LTC1196/LTC1198 Voltage Waveforms for t dis CS t dis 1196/98 TC07 ...
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... SMPL *AFTER COMPLETING THE DATA TRANSFER, IF FURTHER CLOCKS ARE APPLIED WITH CS LOW, THE ADC WILL OUTPUT ZEROS INDEFINITELY Figure 2. LTC1198 Operating Sequence Example: Differential Inputs (CH1, CH0) 14 can convert either channel with respect to ground or the difference between the two. It also automatically powers down when not performing conversion, drawing only leakage current ...
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... START bit is received, the 4-bit input word is shifted into the D input. The fi rst two bits of the input word IN confi gure the LTC1198. The last two bits of the input word allow the ADC to acquire the input voltage by 2.5 clocks before the conversion starts. After the conversion starts, CS ...
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... The pin of the digital systems connected to this data line should be confi gurable as either an input or an output. The LTC1198 will take control of the data line and drive it LOW on the fi fth falling CLK edge after the START bit is received (see Figure 4). Therefore, the port line of the digital systems must be switched to an input before this happens to avoid a confl ...
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... CS pin should be driven with CMOS levels ( buffer of the converter will not draw current. When the CS pin is HIGH (= supply voltage), the LTC1198 is in shutdown mode and draws only leakage current. The status of the D and CLK input has no effect on the IN supply current during this time ...
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... OUT + INPUT – INPUT 18 BOARD LAYOUT CONSIDERATIONS Grounding and Bypassing The LTC1196/LTC1198 are easy to use if some care is OUT taken. They should be used with an analog ground plane and single-point grounding techniques. The GND pin should be tied directly to the ground plane. The V pin should be bypassed to the ground plane with a CC 1μ ...
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... The input capacitor of the LTC1196 is switched onto “+” input at the end of the conversion and samples the input signal until the conversion begins (see Figure 1). The input capacitor of the LTC1198 is switched onto “+” input during the sample phase (t sample phase is 2.5 CLK cycles before conversion starts. ...
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... V IN Figure 8. Analog Input Equivalent Circuit 20 Reduced Reference Operation The minimum reference voltage of the LTC1198 is limited to 2.7V because the V tied together. However, the LTC1196 can operate with reference voltages below 1V. The effective resolution of the LTC1196 can be increased by reducing the input span of the converter. The LTC1196 exhibits good linearity and gain over a wide range of ...
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... The lower the reference voltage to be used, the more critical it becomes to have a clean, noise-free setup. DYNAMIC PERFORMANCE The LTC1196/LTC1198 have exceptionally high speed using a ground plane, sampling capability. Fast Fourier Transform (FFT) test techniques are used to characterize the ADC’s frequency response, distortion and noise at the rated throughput ...
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... Nth harmonics. The typical THD specifi cation in the Dynamic Accuracy table (see the Electrical Charac- teristics section) includes the 2nd through 5th harmonics. With a 100kHz input signal, the LTC1196/LTC1198 have typical THD of 50dB and 49dB with V 3V, respectively. ...
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... CLK B0-B7 B0- + – –IN 4 GND CS RESERVE PINS OF EPM5064: 2, 4-8,15-20, 22, 24, 26-30 1196/98 F12 Figure 13. Interfacing the LTC1196 to the Altera EMP5064 PLD LTC1196/LTC1198 5V 50mW 1MHz 600ns 0.5LSB 7.9 at 300kHz 7.9 at 100kHz 1MHz 50mW 15μW 750kHz 600ns 0.5LSB 7.9 at 300kHz 7.9 at 100kHz 1MHz of the LTC1196 ...
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... TIME (ns) Figure 14. The Timing Diagram the LTC1198 in Figure 15 can be 2. with f 5MHz. At 2.7V, f Recommended Operating Conditions table in the Electrical Characteristics section for limits over temperature. Hardware Description The circuit works as follows: the LTC1198 clock line controls the A/D conversion rate and the data shift rate. ...
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... The auxiliary register pointer is loaded with one and auxiliary register one is loaded with the value 200 hexadecimal. This is the data memory loca- tion where the data from the LTC1198 will be stored. The interrupt mask register (IMR) is confi gured to recognize 1196/98 F16 ...
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... TYPICAL APPLICATIONS Once RINT is generated the code begins execution at the label RINT. This code stores the D LTC1198 in the ACC and then stores it in location 200 hex. The data appears in location 200 hex right-justifi shown in Figure 19. The code is set up to continually loop this point the code jumps to label TXRX and repeats from here ...
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... TYP .016 – .050 .014 – .019 (0.406 – 1.270) (0.355 – 0.483) TYP INCHES (MILLIMETERS) LTC1196/LTC1198 .189 – .197 (4.801 – 5.004) NOTE .150 – .157 (3.810 – 3.988) NOTE 3 ...
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... LTC1196/LTC1198 RELATED PARTS PART NUMBER DESCRIPTION ADCs LTC1402 12-Bit, 2.2Msps Serial ADC LTC1403/LTC1403A 12-/14-Bit, 2.8Msps Serial ADCs LTC1403-1/LTC1403A-1 12-/14-Bit, 2.8Msps Serial ADCs LTC1405 12-Bit, 5Msps Parallel ADC LTC1407/LTC1407A 12-/14-Bit, 3Msps Simultaneous Sampling ADCs LTC1407-1/LTC1407A-1 12-/14-Bit, 3Msps Simultaneous Sampling ADCs LTC1411 14-Bit, 2.5Msps Parallel ADC ...