LTC1096IS8 Linear Technology, LTC1096IS8 Datasheet - Page 27

• Manufacturer Part Number: LTC1096IS8
• Description: IC A/D CONV 8BIT SRL IN/OUT8SOIC
• Manufacturer: Linear Technology

Specifications of LTC1096IS8

• Number Of Bits: 8
• Sampling Rate (per Second): 33k
• Data Interface: Serial
• Number Of Converters: 1
• Power Dissipation (max): 600µW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

TYPICAL APPLICATIONS
Interfacing to the Parallel Port of the
Intel 8051 Family
The Intel 8051 has been chosen to demonstrate the
interface between the LTC1098(L) and parallel port mi-
croprocessors. Normally the CS, CLK and D
would be generated on three port lines and the D
read on a fourth port line. This works very well. However,
we will demonstrate here an interface with the D
D
SERIAL INTERFACE section. This saves one wire.
The 8051 fi rst sends the start bit and MUX address to the
LTC1098(L) over the data line connected to P1.2. Then
P1.2 is reconfi gured as an input (by writing to it a one) and
the 8051 reads back the 8-bit A/D result over the same
data line.
DATA (D
OUT
ANALOG
INPUTS
IN
of the LTC1098(L) tied together as described in the
/D
OUT
CLK
CS
)
CLK AND BEFORE THE 4TH FALLING CLK
AS AN INPUT AFTER THE 4TH RISING
LTC1098(L)
START
8051 P1.2 OUTPUTS DATA
8051 P1.2 RECONFIGURED
1
D
TO LTC1098(L)
CLK
OUT
D
CS
IN
SGL/
DIFF
2
ODD/
SIGN
MUX ADDRESS
A/D RESULT
MSBF BIT LATCHED
3
BY LTC1098(L)
MSBF
4
P1.4
P1.3
P1.2
LTC1098(L) TAKES CONTROL OF DATA LINE
ON 4TH FALLING CLK
IN
OUT
8051
10968 TA06
signals
IN
signal
B7
and
B6
LABEL
LOOP 1
LOOP
B5
MNEMONIC
LTC1098(L) SENDS A/D RESULT
D
R2
OUT
MOV
SETB
CLR
MOV
RLC
CLR
MOV
SETB
DJNZ
MOV
CLR
MOV
MOV
RLC
SETB
CLR
DJNZ
MOV
SETB
B4
MSB
BACK TO 8051 P1.2
B7
from LTC1098(L) Stored in 8051 RAM
B6
LTC1096/LTC1096L
LTC1098/LTC1098L
B3
A, #FFH
P1.4
P1.4
R4, #04
A
P1.3
P1.2, C
P1.3
R4, LOOP 1
P1, #04
P1.3
R4, #09
C, P1.2
A
P1.3
P1.3
R4, LOOP
R2, A
P1.4
OPERAND
B5
B2
B4
B3
COMMENTS
D
Make sure CS is high
CS goes low
Load counter
Rotate D
CLK goes low
Output D
CLK goes high
Next bit
Bit 2 becomes an input
CLK goes low
Load counter
Read data bit into Carry
Rotate data bit into Acc.
CLK goes high
CLK goes low
Next bit
Store MSBs in R2
CS goes high
B1
IN
B2
word for LTC1098(L)
IN
IN
B1
B0
bit into Carry
bit to LTC1098(L)
10968 TA07
B0
LSB
27
10968fc
10968 TA08