AD9269BCPZ-65 Analog Devices Inc, AD9269BCPZ-65 Datasheet - Page 10

• Manufacturer Part Number: AD9269BCPZ-65
• Description: IC ADC 16BIT SER 2CH 64LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9269BCPZ-65

• Data Interface: Serial, SPI™
• Number Of Bits: 16
• Sampling Rate (per Second): 65M
• Number Of Converters: 2
• Power Dissipation (max): 199.8mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Resolution (bits): 16bit
• Sampling Rate: 65MSPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: 1.7V To 1.9V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9269
ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter
AVDD to AGND
DRVDD to AGND
VIN+A, VIN+B, VIN−A, VIN−B to AGND
CLK+, CLK− to AGND
SYNC to AGND
VREF to AGND
SENSE to AGND
VCM to AGND
RBIAS to AGND
CSB to AGND
SCLK/DFS to AGND
SDIO/DCS to AGND
OEB to AGND
PDWN to AGND
D0x through D15x to AGND
DCOx to AGND
Operating Temperature Range (Ambient)
Maximum Junction Temperature Under Bias
Storage Temperature Range (Ambient)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rating
−0.3 V to +2.0 V
−0.3 V to +3.9 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−40°C to +85°C
150°C
−65°C to +150°C
Rev. 0 | Page 10 of 40
THERMAL CHARACTERISTICS
The exposed paddle is the only ground connection for the chip.
The exposed paddle must be soldered to the AGND plane of the
user’s PCB. Soldering the exposed paddle to the user’s board
also increases the reliability of the solder joints and maximizes
the thermal capability of the package.
Table 7. Thermal Resistance
Package Type
64-Lead LFCSP
1
2
3
4
Typical θ
plane. As shown in Table 7, airflow improves heat dissipation,
which reduces θ
package leads from metal traces, through holes, ground, and
power planes, reduces the θ
ESD CAUTION
Per JEDEC 51-7, plus JEDEC 25-5 2S2P test board.
Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air).
Per MIL-Std 883, Method 1012.1.
Per JEDEC JESD51-8 (still air).
9 mm × 9 mm
(CP-64-4)
JA
is specified for a 4-layer PCB with a solid ground
JA
. In addition, metal in direct contact with the
Airflow
Velocity
(m/sec)
0
1.0
2.5
JA
.
θ
23
20
18
JA
1, 2
θ
2.0
JC
1, 3
θ
12
JB
1, 4
Unit
°C/W
°C/W
°C/W