AD9265BCPZ-80 Analog Devices Inc, AD9265BCPZ-80 Datasheet - Page 9

• Manufacturer Part Number: AD9265BCPZ-80
• Description: IC ADC 16BIT 80MSPS 48LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9265BCPZ-80

• Data Interface: Serial, SPI™
• Number Of Bits: 16
• Sampling Rate (per Second): 80M
• Number Of Converters: 1
• Power Dissipation (max): 258mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VFQFN, CSP Exposed Pad
• Resolution (bits): 16bit
• Sampling Rate: 80MSPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: 1.7V To 1.9V
• Supply Voltage Range - Digital: 1.7V To 1.9V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TIMING SPECIFICATIONS
Table 5.
Parameter
SYNC TIMING REQUIREMENTS
SPI TIMING REQUIREMENTS
Timing Diagrams
t
t
t
t
t
t
t
t
t
t
t
SSYNC
HSYNC
DS
DH
CLK
S
H
HIGH
LOW
EN_SDIO
DIS_SDIO
D0/1+ TO D14/D15+
D0/1– TO D14/D15–
NOTES
1. DEx DENOTES EVEN BIT.
2. DOx DENOTES ODD BIT.
DCO/DCO+
D0 TO D15
DCO–
CLK+
CLK–
VIN
LVDS (DDR) MODE
CMOS MODE
SYNC
CLK+
Conditions
SYNC to rising edge of CLK setup time
SYNC to rising edge of CLK hold time
Setup time between the data and the rising edge of SCLK
Hold time between the data and the rising edge of SCLK
Period of the SCLK
Setup time between CSB and SCLK
Hold time between CSB and SCLK
SCLK pulse width high
SCLK pulse width low
Time required for the SDIO pin to switch from an input to an
output relative to the SCLK falling edge
Time required for the SDIO pin to switch from an output to an
input relative to the SCLK rising edge
Figure 2. LVDS (DDR) and CMOS Output Mode Data Output Timing
N – 1
t
CH
t
DCO
t
SSYNC
t
Figure 3. SYNC Input Timing Requirements
CL
t
PD
N
t
t
A
CLK
DEx
– 12
Rev. A | Page 9 of 44
Dx – 12
t
SKEW
N + 1
DOx
– 12
t
HSYNC
DEx
– 11
Dx – 11
N + 2
DOx
– 11
DEx
– 10
Dx – 10
N + 3
DOx
– 10
DEx
– 9
Dx – 9
Min
2
2
40
2
2
10
10
10
10
N + 4
DOx
– 9
DEx
– 8
Dx – 8
Typ
0.30
0.40
N + 5
DOx
– 8
Max
AD9265
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns