MAX1186ECM+D Maxim Integrated Products, MAX1186ECM+D Datasheet - Page 19

IC ADC 10BIT 40MSPS DL 48-TQFP

MAX1186ECM+D

Manufacturer Part Number
MAX1186ECM+D
Description
IC ADC 10BIT 40MSPS DL 48-TQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1186ECM+D

Number Of Bits
10
Sampling Rate (per Second)
40M
Data Interface
Parallel
Number Of Converters
2
Power Dissipation (max)
150mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
Conversion Rate
40 MSPs
Resolution
10 bit
Snr
59.5 dB
Voltage Reference
2.048 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Power Dissipation
2430 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Input Voltage
3 V
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 8. Typical QAM Application, Using the MAX1186
Figure 9. T/H Aperture Timing
Internal Reference and Multiplexed Parallel Outputs
DATA (T/H)
SAMPLED
ANALOG
INPUT
CLK
T/H
t
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
AD
TRACK
______________________________________________________________________________________
t
HOLD
AJ
DOWNCONVERTER
TRACK
MAX2451
THD is typically the ratio of the RMS sum of the first four
harmonics of the input signal to the fundamental itself.
This is expressed as:
where V
V
harmonics.
SFDR is the ratio expressed in decibels of the RMS
amplitude of the fundamental (maximum signal compo-
nent) to the RMS value of the next largest spurious
component, excluding DC offset.
The two-tone IMD is the ratio expressed in decibels of
either input tone to the worst 3rd-order (or higher) inter-
modulation products. The individual input tone levels
are backed off by 6.5dBFS from full scale.
5
are the amplitudes of the 2nd- through 5th-order
÷ 8
Spurious-Free Dynamic Range (SFDR)
THD
1
is the fundamental amplitude, and V
90°
=
Intermodulation Distortion (IMD)
Total Harmonic Distortion (THD)
20
×
log
10
INA+
INA-
INB+
INB-
V
MAX1186
2
2
+
V
3
A/B
2
V
+
1
CHA AND CHB DATA
ALTERNATINGLY
AVAILABLE ON 10-BIT,
MULTIPLEXED
OUTPUT BUS
V
4
2
PROCESSING
+
V
POST
DSP
5
2
2
through
19

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