MAX11045ETN+ Maxim Integrated Products, MAX11045ETN+ Datasheet - Page 11

• Manufacturer Part Number: MAX11045ETN+
• Description: ADC 16BIT SAMPLING 6CH 56-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX11045ETN+

• Number Of Bits: 16
• Sampling Rate (per Second): 250k
• Data Interface: Parallel
• Number Of Converters: 6
• Power Dissipation (max): 2.22W
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-WQFN Exposed Pad, 56-HWQFN
• Number Of Adc Inputs: 6
• Architecture: SAR
• Conversion Rate: 250 KSPs
• Resolution: 16 bit
• Input Type: Voltage
• Interface Type: Parallel
• Snr: 92.3 dB
• Voltage Reference: Internal 4.096 V
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 2.7 V, 4.75 V
• Maximum Power Dissipation: 2222 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Input Voltage: 5 V
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24, 30, 41, 47
25, 31, 40, 46
26, 29, 42, 45
MAX11044
(TQFN-EP)
32
34
37
39
36
52
53
54
55
56
—
—
—
—
—
______________________________________________________________________________________
24, 30, 41, 47
25, 31, 40, 46
MAX11045
(TQFN-EP)
26, 45
PIN
29
32
34
37
36
39
42
—
—
52
53
54
55
56
—
24, 30, 41, 47
25, 31, 40, 46
(TQFN-EP)
MAX11046
26
29
32
34
36
37
39
42
45
52
54
54
55
56
—
—
Simultaneous-Sampling ADCs
4-/6-/8-Channel, 16-/14-Bit,
NAME
AGND
REFIO
AVDD
DB15
DB14
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
WR
I.C.
CS
RD
EP
Analog Supply Input. Bypass AVDD to AGND with a
0.1µF capacitor at each AVDD input.
Analog Ground. Connect all AGND inputs together.
Channel 0 Analog Input
Channel 1 Analog Input
Channel 2 Analog Input
Channel 3 Analog Input
External Reference Input/Internal Reference Output.
Place a 0.1µF capacitor from REFIO to AGND.
Channel 4 Analog Input
Channel 5 Analog Input
Channel 6 Analog Input
Channel 7 Analog Input
Active-Low Write Input. Drive WR low to write to the
ADC. Configuration registers are loaded on the rising
edge of WR.
Active-Low Chip-Select Input. Drive CS low when
reading from or writing to the ADC.
Active-Low Read Input. Drive RD low to read from the
ADC. Each rising edge of RD advances the channel
output on the data bus.
16-Bit Parallel Data Bus Digital Output Bit 15
16-Bit Parallel Data Bus Digital Output Bit 14
Internally Connected. Connect to AGND.
E xp osed P ad . Inter nal l y connected to AG N D . C onnect to
a l ar g e g r ound p l ane to m axi m i ze ther m al p er for m ance.
N ot i ntend ed as an el ectr i cal connecti on p oi nt.
Pin Description (continued)
FUNCTION
11