CS5509-ASZ Cirrus Logic Inc, CS5509-ASZ Datasheet - Page 4

• Manufacturer Part Number: CS5509-ASZ
• Description: IC ADC 16BIT SGNL SUPP 16-SOIC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5509-ASZ

• Number Of Converters: 1
• Package / Case: 16-SOIC (0.300", 7.50mm Width)
• Number Of Bits: 16
• Sampling Rate (per Second): 200
• Data Interface: Serial
• Power Dissipation (max): 2.25mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 1
• Architecture: Delta-Sigma
• Conversion Rate: 20 SPs
• Resolution: 16 bit
• Input Type: Voltage
• Interface Type: Serial
• Voltage Reference: 1.2 V
• Supply Voltage (max): 5 V
• Supply Voltage (min): 3.3 V
• Maximum Power Dissipation: 2.25 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Input Voltage: 3.3 V to 5 V
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1100-5

5V SWITCHING CHARACTERISTICS
Input Levels: Logic 0 = 0V, Logic 1 = VD+; C
Notes: 10. Specified using 10% and 90% points on waveform of interest.
4
Master Clock Frequency
Master Clock Duty Cycle
Rise Times
Fall Time
Start-Up
Power-On Reset Period
Oscillator Start-up Time
Wake-up Period
Calibration
CONV Pulse Width (CAL = 1)
CONV and CAL High to Start of Calibration
Start of Calibration to End of Calibration
Conversion
CONV Pulse Width
CONV High to Start of Conversion
Set Up Time
Hold Time
Start of Conversion to End of Conversion
11. An internal power-on-reset is activated whenever power is applied to the device.
12. Oscillator start-up time varies with the crystal parameters. This specification does not apply when using
13. The wake-up period begins once the oscillator starts; or when using an external f
14. Calibration can also be initiated by pulsing CAL high while CONV=1.
15. Conversion time will be 1622/f
an external clock source.
reset time elapses.
Parameter
BP/UP stable prior to DRDY falling
Any Digital Input
Any Digital Output
Any Digital Input
Any Digital Output
XTAL = 32.768 kHz (Note 12)
BP/UP stable after DRDY falls
clk
Internal Oscillator
L
if CONV remains high continuously.
= 50 pF) (Note 2)
External Clock
(Note 10)
(Note 10)
(Note 13)
(Note 14)
(Note 15)
(Note 11)
(T
A
= 25 °C; VA+, VD+ = 5V ±5%;
Symbol
t
t
XIN
t
t
t
t
t
t
t
t
f
t
t
t
wup
ccw
cpw
rise
osu
bus
buh
con
scn
fall
res
cal
clk
scl
82/f
30.0
Min
100
100
30
40
0
-
-
-
-
-
-
-
-
-
-
-
clk
1800/f
3246/f
1624/f
32.768
Typ
500
50
20
10
-
-
-
-
-
-
-
-
-
-
clk
clk
clk
clk
, after the power-on
2/f
2/f
clk
clk
Max
53.0
330
1.0
1.0
60
-
-
-
-
-
-
-
-
-
-
-
+200
+200
CS5509
DS125F3
Unit
kHz
kHz
ms
ms
µs
ns
µs
ns
ns
ns
ns
ns
ns
%
s
s
s
s