MAX5864ETM+ Maxim Integrated Products, MAX5864ETM+ Datasheet - Page 24
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MAX5864ETM+
Manufacturer Part Number
MAX5864ETM+
Description
IC ANLG FRONT END 22MSPS 48-TQFN
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX5864ETM.pdf
(26 pages)
Specifications of MAX5864ETM+
Number Of Bits
10
Number Of Channels
4
Power (watts)
2.10W
Voltage - Supply, Analog
2.7 V ~ 3.3 V
Voltage - Supply, Digital
1.8 V ~ 3.3 V
Package / Case
48-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Ultra-Low-Power, High Dynamic-
Performance, 22Msps Analog Front End
HD3 is defined as the ratio of the RMS value of the third
harmonic component to the fundamental input signal.
SFDR is the ratio expressed in decibels of the RMS
amplitude of the fundamental (maximum signal compo-
nent) to the RMS value of the next-largest spurious
component, excluding DC offset.
IMD is the total power of the intermodulation products
relative to the total input power when two tones, f
f
ucts are (f
±f
IM3 is the power of the worst third-order intermodula-
tion product relative to the input power of either input
tone when two tones, f
inputs. The 3rd-order intermodulation products are (2 x
f
at -7dBFS.
Power-supply rejection is defined as the shift in offset
and gain error when the power supply is changed
±5%.
A small -20dBFS analog input signal is applied to an
ADC in such a way that the signal’s slew rate does not
limit the ADC’s performance. The input frequency is
then swept up to the point where the amplitude of the
digitized conversion result has decreased by 3dB. Note
that the T/H performance is usually the limiting factor
for the small-signal input bandwidth.
A large -0.5dBFS analog input signal is applied to an
ADC, and the input frequency is swept up to the point
where the amplitude of the digitized conversion result
has decreased by 3dB. This point is defined as the full-
power bandwidth frequency.
24
2
1
, are present at the inputs. The intermodulation prod-
1
±f
). The individual input tone levels are at -7dBFS.
2
______________________________________________________________________________________
), (2
✕
1
±f
f
2
2
Spurious-Free Dynamic Range (SFDR)
±f
), (2
1
). The individual input tone levels are
✕
Third Harmonic Distortion (HD3)
Intermodulation Distortion (IMD)
3rd-Order Intermodulation (IM3)
f
1
), (2
1
and f
✕
Power-Supply Rejection
Small-Signal Bandwidth
f
Full-Power Bandwidth
2
2
), (2
, are present at the
✕
f
1
±f
2
), (2
1
✕
and
f
2
THD is the ratio of the RMS sum of the output harmonics
up to the Nyquist frequency divided by the fundamental:
where V
V
up to the Nyquist frequency.
Spurious-free dynamic range (SFDR) is the ratio of RMS
amplitude of the fundamental (maximum signal compo-
nent) to the RMS value of the next-largest distortion
component up to the Nyquist frequency excluding DC.
TRANSISTOR COUNT: 16,765
PROCESS: CMOS
n
TOP VIEW
are the amplitudes of the 2nd through nth harmonic
REFP
GND
GND
GND
CLK
QA+
V
V
QA-
V
IA+
IA-
DD
DD
DD
1
DAC Dynamic Parameter Definitions
10
11
12
1
2
3
4
5
6
7
8
9
THD
is the fundamental amplitude and V
=
20log
Spurious-Free Dynamic Range
MAX5864
QFN
(V + V + ... + V )
Pin Configuration
Total Harmonic Distortion
2
Chip Information
2
3
2
V
1
n
2
36
35
34
33
32
31
30
29
28
27
26
25
2
through
SCLK
DIN
V
DD9
DD8
DD7
DD6
DD5
DD4
DD3
DD2
CS
DD