ISL51002CQZ-165 Intersil, ISL51002CQZ-165 Datasheet - Page 6
ISL51002CQZ-165
Manufacturer Part Number
ISL51002CQZ-165
Description
IC FRONT END 10BIT VID 128-MQFP
Manufacturer
Intersil
Datasheet
1.ISL51002CQZ-165.pdf
(32 pages)
Specifications of ISL51002CQZ-165
Number Of Bits
10
Number Of Channels
3
Power (watts)
1.2W
Voltage - Supply, Analog
1.8V, 3.3V
Voltage - Supply, Digital
1.8V, 3.3V
Package / Case
128-MQFP, 128-PQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL51002CQZ-165
Manufacturer:
INTERSIL
Quantity:
20 000
Timing Diagrams
Data Output Setup and Hold Timing
RGB Output Data Timing and Latency
YUV Output Data Timing and Latency
PIXEL DATA
DATACLK
R/G/B[9:0]
VIDEO IN
ANALOG
DATACLK
HSYNC
DATACLK
DATACLK
VIDEO IN
ANALOG
HSYNC
G[9:0]
R[9:0]
B[9:0]
HS
HS
OUT
OUT
IN
IN
P
P
0
0
6
P
P
1
1
8 DATACLK PIPELINE LATENCY
8 DATACLK PIPELINE LATENCY
P
P
2
2
THE HSYNC EDGE (PROGRAMMABLE LEADING OR TRAILING) THAT THE DPLL IS LOCKED TO.
THE SAMPLING PHASE SETTING DETERMINES ITS RELATIVE POSITION TO THE REST OF THE
AFE’S OUTPUT SIGNALS
THE HSYNC EDGE (PROGRAMMABLE LEADING OR TRAILING) THAT THE DPLL IS LOCKED
TO. THE SAMPLING PHASE SETTING DETERMINES ITS RELATIVE POSITION TO THE REST
OF THE AFE’S OUTPUT SIGNALS
P
t
SETUP
P
3
3
ISL51002
WIDTH AND POLARITY
P
P
4
PROGRAMMABLE
4
t
HOLD
WIDTH AND POLARITY
P
PROGRAMMABLE
5
P
5
P
6
P
6
P
7
P
7
P
8
P
G
B
8
0
0
(U
(Y
D
P
O
O
) G
) R
0
9
P
9
0
1
(Y
(V
P
D
1
0
10
) B
) G
1
P
10
2
2
(U
(Y
P
2
2
D
11
)
)
2
September 19, 2007
P
G
R
11
2
3
(Y
(V
P
3
2
12
D
)
)
FN6164.2
3
P
12