ISL12008IB8Z-T Intersil, ISL12008IB8Z-T Datasheet - Page 10

• Manufacturer Part Number: ISL12008IB8Z-T
• Description: IC RTC I2C LO-POWER 8-SOIC
• Manufacturer: Intersil
• Type: Clock/Calendarr

Specifications of ISL12008IB8Z-T

• Time Format: HH:MM:SS (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -

Real Time Clock Registers
NOTE: 0 = must be set to‘0’
Addresses [00h to 06h, and 1Fh]
RTC REGISTERS (SC, MN, HR, DW, DT, MO, YR, SS)
These registers depict BCD representations of the time. As
such, SC (Seconds, address 00h) and MN (Minutes,
address 01h) range from 0 to 59, HR (Hour, address 02h) is
in 24-hour mode with a range from 0 to 23, DW (Day of the
Week, address 03h) is 1 to 7, DT (Date, address 04h) is 1 to
31, MO (Month, address 05h) is 1 to 12, YR (Year, address
06h) is 0 to 99, and SS (Sub-Seconds/Hundredths of
Seconds, address 1Fh) is 0 to 99. The default for all the time
keeping bits are set to “0” at power up.
Bit D7 of SC register contain the crystal enable/disable bit
(ST). Setting ST to “1” will disable the crystal from oscillating
and stop the counting in RTC register. When the ST bit is set
to “1”, it will casue the OF bit to set to “1” due to no crystal
oscillation on the X1 pin. The ST bit is set to “0” on power-up
for normal operation.
Bit D7 of MN register contain the Oscillator Fail Indicator bit
(OF). This bit is set to a “1” when the X1 pin has no
ADDR. SECTION
(Read-
Only)
0Ch
0Dh
0Ah
0Bh
0Eh
0Fh
1Fh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
10h
11h
Control
Alarm0
Status
RTC
RTC
NAME
MOA
DWA
REG
MNA
HRA
DTR
SCA
ATR
DTA
MN
DW
MO
INT
SC
HR
YR
OF
SR
DT
SS
10
BMATR1
EMNA
EMOA
EDWA
ESCA
EHRA
ARST
EDTA
YR23
SS23
OUT
CEB
OF
OF
ST
0
0
0
0
7
BMATR0
XSTOP
AMN22
ASC22
MN22
ALME
SC22
YR22
SS22
CB
FT
6
0
0
0
0
0
0
0
0
TABLE 1. REGISTER MEMORY MAP
LPMODE
RESEAL
AMN21
AHR21
ASC21
ADT21
MN21
SC21
HR21
YR21
DTR5
ATR5
DT21
SS21
0
5
0
0
0
0
ISL12008
AMO20
AMN20
AHR20
ASC20
ADT20
MN20
MO20
DTR4
SC20
HR20
YR20
ATR4
DT20
SS20
4
0
0
0
0
0
BIT
oscillation. This bit can be reset when the X1 has crystal
oscillation and a write to “0”. This bit can only be written as
“0” and not as a “1”. The OF bit is set to “1” at power-up from
a complete power down (V
Address 9, bit 7 is also used as the OF bit for DS1340
compatibility, and the two OF bits are interchangable.
Bits D6 and D7 of HR register (century/hours register)
contain the century enable bit (CEB) and the century bit
(CB). Setting CEB to a '1' will cause CB to toggle, either from
'0' to '1' or from '1' to '0' at the turn of the century (depending
upon its initial state). If CEB is set to a '0', CB will not toggle.
The DW register provides a Day of the Week status and uses
three bits DW2 to DW0 to represent the seven days of the
week. The counter advances in the cycle 1-2-3-4-5-6-7-1-2-
… The assignment of a numerical value to a specific day of
the week is arbitrary and may be decided by the system
software designer.
AMN13
AMO13
ASC13
AHR13
ADT13
MN13
MO13
DTR3
SC13
HR13
DT13
YR13
ATR3
SS13
3
0
0
0
0
0
AMN12
AMO12
ADW12
ASC12
AHR12
ADT12
DW12
MO12
MN12
DTR2
SC12
HR12
DT12
YR12
ATR2
SS12
ALM
2
0
0
AMO11
ADW11
AMN11
AHR11
ASC11
ADT11
DW11
MN11
MO11
DTR1
SC11
HR11
YR11
ATR1
DT11
SS11
BAT
1
0
0
DD
and V
AMO10
ADW10
AMN10
ASC10
AHR10
ADT10
MN10
DW10
MO10
HR10
DTR0
RTCF
SC10
DT10
YR10
ATR0
SS10
0
0
0
BAT
are removed).
00 to 59
00 to 59
RANGE DEFAULT
0 to 59
0 to 59
0 to 23
1 to 31
1 to 12
0 to 99
0 to 23
1 to 31
1 to 12
0 to 99
1 to 7
1 to 7
RTC
N/A
N/A
N/A
N/A
N/A
September 26, 2008
REG
00h
80h
00h
00h
00h
00h
00h
80h
00h
80h
00h
03h
00h
00h
00h
00h
00h
00h
00h
FN6690.1