M41T56M6E STMicroelectronics, M41T56M6E Datasheet - Page 11

• Manufacturer Part Number: M41T56M6E
• Description: IC SRAM SRL TIMEKPR 512BIT 8SOIC
• Manufacturer: STMicroelectronics
• Type: Clock/Calendar/NVSRAMr

Specifications of M41T56M6E

• Memory Size: 56B
• Time Format: HH:MM:SS (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Function: Clock/Calendar
• Rtc Memory Size: 64 Byte
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial (2-Wire, I2C)
• Nvram Features: RTC, Internal Battery, XTAL
• Interface Type: I2C, Serial, 2-Wire
• Supply Voltage Range: 4.5V To 5.5V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 497-2818-5; M41T56M6

CLOCK OPERATION
The eight byte clock register (see Table 3) is used
to both set the clock and to read the date and time
from the clock, in a binary coded decimal format.
Seconds, Minutes, and Hours are contained within
the first three registers. Bits D6 and D7 of Clock
Register 2 (Hours Register) contain the CENTU-
RY ENABLE Bit (CEB) and the CENTURY Bit
(CB). Setting CEB to a '1' will cause CB to toggle,
either from '0' to '1' or from '1' to '0' at the turn of
the century (depending upon its initial state). If
CEB is set to a '0,' CB will not toggle. Bits D0
through D2 of Register 3 contain the Day (day of
week). Registers 4, 5, and 6 contain the Date (day
of month), Month, and Years. The final register is
the Control Register (this is described in the Clock
Calibration section). Bit D7 of Register 0 contains
the STOP Bit (ST). Setting this bit to a '1' will cause
the oscillator to stop.
Table 3. Register Map
Keys:
Note: 1. When CEB is set to '1,' CB will toggle from '0' to '1' or from '1' to '0' every 100 years (dependent upon the initial value set).
Address
2. When CEB is set to '0,' CB will not toggle.
0
1
2
3
4
5
6
7
S = SIGN Bit
FT = FREQUENCY TEST Bit
ST = STOP Bit
OUT = Output level
CEB
OUT
D7
ST
X
X
X
X
(1)
D6
CB
FT
X
X
X
10 Years
10 Seconds
10 Minutes
D5
X
X
S
10 Hours
10 Date
10 M.
D4
X
Data
D3
X
Calibration
If the device is expected to spend a significant
amount of time on the shelf, the oscillator may be
stopped to reduce current drain. When reset to a
'0' the oscillator restarts within one second.
The seven Clock Registers may be read one byte
at a time, or in a sequential block. The Control
Register (Address location 7) may be accessed in-
dependently. Provision has been made to assure
that a clock update does not occur while any of the
seven clock addresses are being read. If a clock
address is being read, an update of the clock reg-
isters will be delayed by 250ms to allow the READ
to be completed before the update occurs. This
will prevent a transition of data during the READ.
Note: This 250ms delay affects only the clock reg-
ister update and does not alter the actual clock
time.
D2
Seconds
Minutes
Month
Hours
Years
Date
X = Don't care
CEB = Century Enable Bit
CB = Century Bit
Day
D1
D0
Century/Hours
Seconds
Minutes
Control
Month
Function/Range
Date
Year
Day
BCD Format
0-1/00-23
M41T56
00-59
00-59
01-07
01-31
01-12
00-99
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