DS1743-100IND+ Maxim Integrated Products, DS1743-100IND+ Datasheet - Page 7

• Manufacturer Part Number: DS1743-100IND+
• Description: IC RTC RAM Y2K 5V 100NS 28-EDIP
• Manufacturer: Maxim Integrated Products
• Type: Clock/Calendar/NVSRAM/Y2Kr

Specifications of DS1743-100IND+

• Memory Size: 64K (8K x 8)
• Time Format: HH:MM:SS (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 28-DIP Module (600 mil), 28-EDIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WRITING DATA TO RAM OR CLOCK
The DS1743 is in the write mode whenever WE, and CE are in their active state. The start of a write is
referenced to the latter occurring transition of WE, on CE. The addresses must be held valid throughout the
cycle. CE or WE must return inactive for a minimum of t
cycle. Data in must be valid t
application, the OE signal will be high during a write cycle. However, OE can be active provided that care
is taken with the data bus to avoid bus contention. If OE is low prior to WE transitioning low the data bus
can become active with read data defined by the address inputs. A low transition on WE will then disable
the outputs t
DATA-RETENTION MODE
The 5V device is fully accessible and data can be written or read only when V
However, when V
internal clock registers and SRAM are blocked from any access. At this time (PowerCap only) the power-
fail reset-output signal (RST) is driven active and remains active until V
V
in to the backup battery. RTC operation and SRAM data are maintained from the battery until V
returned to nominal levels.
The 3.3V device is fully accessible and data can be written or read only when V
When V
fail reset-output signal (RST) is driven active and remains active until V
is less than V
below V
when V
returned to nominal levels. The RST (PowerCap only) signal is an open-drain output and requires a pullup
resistor. Except for RST, all control, data, and address signals must be powered down when V
powered down.
BATTERY LONGEVITY
The DS1743 has a lithium power source that is designed to provide energy for clock activity and clock and
RAM data retention when the V
sufficient to power the DS1743 continuously for the life of the equipment in which it is installed. For
specification purposes, the life expectancy is 10 years at +25C with the internal clock oscillator running in
the absence of V
source disconnected, guaranteeing full energy capacity. When V
V
DS1743 will be longer than 10 years since no lithium battery energy is consumed when V
BATTERY MONITOR
The DS1743 constantly monitors the battery voltage of the internal battery. The battery flag bit (bit 7) of
the day register is used to indicate the voltage level range of the battery. This bit is not writeable and
should always be a 1 when read. If a 0 is ever present, an exhausted lithium energy source is indicated and
both the contents of the RTC and RAM are questionable.
CC
PF
, the lithium energy source is enabled for battery backup operation. Actual life expectancy of the
falls below the battery switch point V
CC
CC
PF
. If V
drops below V
falls below the power-fail point, V
WEZ
SO
PF
, the device power is switched from V
after WE goes active.
CC
is greater than V
CC
power. Each DS1743 is shipped from Dallas Semiconductor with its lithium energy
is below the power-fail point, V
SO
. RTC operation and SRAM data are maintained from the battery until V
DS
prior to the end of write and remain valid for t
CC
SO
supply is not present. The capability of this internal power supply is
, the device power is switched from V
SO
(battery supply level), device power is switched from the V
DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs
PF
, access to the device is inhibited. At this time the power-
7 of 16
CC
PF
WR
, (point at which write protection occurs) the
to the backup supply (V
prior to the initiation of another read or write
CC
is first applied at a level greater than
CC
CC
returns to nominal levels. When
returns to nominal levels. If V
CC
to the backup supply (V
DH
CC
afterward. In a typical
CC
BAT
is greater than V
is greater than V
) when V
CC
is present.
CC
drops
CC
CC
CC
BAT
CC
PF
PF.
PF
is
is
is
)
.