M41ST85WMH6E STMicroelectronics, M41ST85WMH6E Datasheet - Page 27

IC RTC 3.0V 512BIT NVRAM 28SOIC

M41ST85WMH6E

Manufacturer Part Number
M41ST85WMH6E
Description
IC RTC 3.0V 512BIT NVRAM 28SOIC
Manufacturer
STMicroelectronics
Type
Clock/Calendar/Supervisorr
Datasheet

Specifications of M41ST85WMH6E

Memory Size
64B
Time Format
HH:MM:SS:hh (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SOIC, 28-SOH (8.48mm Width)
Function
Clock/Calendar/Supervisor/Alarm
Rtc Memory Size
64 Byte
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Rtc Bus Interface
Serial (2-Wire, I2C)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-2804-5
M41ST85WMH6

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M41ST85W
3.10
3.11
Note:
3.12
Note:
follows PFI. If the comparator is unused, PFI should be connected to V
unconnected.
Century bit
Bits D7 and D6 of clock register 03h contain the CENTURY ENABLE bit (CEB) and the
CENTURY bit (CB). Setting CEB to a '1' will cause CB to toggle, either from a '0' to '1' or
from '1' to '0' at the turn of the century (depending upon its initial state). If CEB is set to a '0,'
CB will not toggle.
Output driver pin
When the FT bit, AFE bit and watchdog register are not set, the IRQ/FT/OUT pin becomes
an output driver that reflects the contents of D7 of the control register. In other words, when
D7 (OUT bit) and D6 (FT bit) of address location 08h are a '0,' then the IRQ/FT/OUT pin will
be driven low.
The IRQ/FT/OUT pin is an open drain which requires an external pull-up resistor.
Battery low warning
The M41ST85W automatically performs battery voltage monitoring upon power-up and at
factory-programmed time intervals of approximately 24 hours. The battery low (BL) bit, bit
D4 of flags register 0Fh, will be asserted if the battery voltage is found to be less than
approximately 2.5 V. The BL bit will remain asserted until completion of battery replacement
and subsequent battery low monitoring tests, either during the next power-up sequence or
the next scheduled 24-hour interval.
If a battery low is generated during a power-up sequence, this indicates that the battery is
below approximately 2.5 volts and may not be able to maintain data integrity in the SRAM.
Data should be considered suspect and verified as correct. A fresh battery should be
installed.
If a battery low indication is generated during the 24-hour interval check, this indicates that
the battery is near end of life. However, data is not compromised due to the fact that a
nominal V
battery backup mode, the battery should be replaced. The SNAPHAT
while V
This will cause the clock to lose time during the interval the SNAPHAT battery/crystal top is
disconnected.
The M41ST85W only monitors the battery when a nominal V
Thus applications which require extensive durations in the battery backup mode should be
powered-up periodically (at least once every few months) in order for this technique to be
beneficial. Additionally, if a battery low is indicated, data integrity should be verified upon
power-up via a checksum or other technique.
CC
CC
is applied to the device.
is supplied. In order to insure data integrity during subsequent periods of
CC
is applied to the device.
®
SS
top may be replaced
and PFO left
Clock operation
27/41

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