M41T82RM6F STMicroelectronics, M41T82RM6F Datasheet - Page 29

• Manufacturer Part Number: M41T82RM6F
• Description: IC RTC SERIAL W/BATT SW 8-SOIC
• Manufacturer: STMicroelectronics
• Type: Clock/Calendar/Alarmr

Specifications of M41T82RM6F

• Memory Size: 32B
• Time Format: HH:MM:SS:hh (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8279-2; M41T82RM6F

M41T82-M41T83
3.4.2
Analog calibration (programmable load capacitance)
A second method of calibration employs the use of programmable internal load capacitors to
adjust (or trim) the oscillator frequency. As discussed in
test output can be used to determine the amount of frequency error in the oscillator.
Changes in the analog calibration value will affect the frequency test output, thus the user
can immediately see the effects of these changes (see
information on enabling the FT output).
By design, the oscillator is intended to be 0 ppm ± crystal accuracy at room temperature
(25 °C, see
the crystal will be 25 pF. For incrementing or decrementing the calibration value,
capacitance will be added or removed in increments of 0.25 pF to each side of the crystal.
Internally, C
C
effective on-chip series load capacitance, C
nominal value of 12.5 pF (AC0 – AC6 = 0).
The effective series load capacitance (C
Seven analog calibration bits, AC0 to AC6, are provided in order to adjust the on-chip load
capacitance value for frequency compensation of the RTC. Each bit has a different weight
for capacitance adjustment. An analog calibration sign (ACS) bit determines if capacitance
is added (ACS bit = 0, negative calibration) or removed (ACS bit = 1, positive calibration).
The majority of the calibration adjustment is positive (i.e. to increase the oscillator frequency
by removing capacitance) due to the typical characteristic of quartz crystals to slow down
due to changes in temperature, but negative calibration is also available.
Since the analog calibration register adjustment is essentially pulling the frequency of the
oscillator, the resulting frequency changes will not be linear with incremental capacitance
changes. The equations which govern this mechanism indicate that smaller capacitor values
of analog calibration adjustment will provide larger increments. Thus, the larger values of
analog calibration adjustment will produce smaller incremental frequency changes. These
values typically vary from 6-10 ppm/bit at the low end to <1 ppm/bit at the highest
capacitance settings. The range provided by the analog calibration register adjustment with
a typical surface mount crystal is approximately ±30 ppm around the AC6-AC0 = 0 default
setting because of this property (see
Pre-programmed calibration value
Users of the M41T83 in the embedded crystal package have the option of using the factory
programmed analog calibration value (refer to
SOX18 package only) on page
XO
, connected from the XI and XO pins to ground (see
Figure 17 on page
LOAD
of the oscillator is changed via two digitally controlled capacitors, C
Doc ID 12578 Rev 12
C
30). For a 12.5 pF crystal, the default loading on each side of
45).
LOAD
Table 7 on page
=
LOAD
1
⁄
(
LOAD
1 C
) is the combination of C
⁄
Section 3.17: OTP bit operation (M41T83 in
, ranges from 3.5 pF to 17.4 pF, with a
XI
+
1 C
30).
⁄
Section 3.14 on page 41
Section
Figure 16 on page
XO
)
3.4.1, the 512 Hz frequency
XI
and C
Clock operation
25). The
XO
for more
:
XI
29/61
and