M41T65Q6F STMicroelectronics, M41T65Q6F Datasheet - Page 29

• Manufacturer Part Number: M41T65Q6F
• Description: IC RTC SERIAL W/ALARM 16QFN
• Manufacturer: STMicroelectronics
• Type: Clock/Calendar/Alarmr

Specifications of M41T65Q6F

• Memory Size: 16B
• Time Format: HH:MM:SS:hh (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.3 V ~ 4.4 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-QFN
• Function: Clock/Calendar/Alarm/Timer Interrupt
• Rtc Memory Size: 16 Byte
• Supply Voltage (max): 4.4 V
• Supply Voltage (min): 1.3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial (2-Wire, I2C)
• Supply Current: 50 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-3908-2

M41T62/63/64/65
3.8
3.9
Note:
3.10
Note:
Century bits
These two bits will increment in a binary fashion at the turn of the century, and handle all
leap years correctly. See
Output driver pin (M41T62/65)
When the OFIE bit, AFE bit, and watchdog register are not set to generate an interrupt, the
IRQ/OUT pin becomes an output driver that reflects the contents of D7 of the calibration
register. In other words, when D7 (OUT bit) is a '0,' then the IRQ/OUT pin will be driven low.
The IRQ/OUT pin is an open drain which requires an external pull-up resistor.
Oscillator stop detection
If the oscillator fail (OF) bit is internally set to a '1,' this indicates that the oscillator has either
stopped, or was stopped for some period of time and can be used to judge the validity of the
clock and date data. This bit will be set to '1' any time the oscillator stops.
In the event the OF bit is found to be set to '1' at any time other than the initial power-up, the
STOP bit (ST) should be written to a '1,' then immediately reset to '0.' This will restart the
oscillator.
The following conditions can cause the OF bit to be set:
●
If the OF bit cannot be written to '0' four (4) seconds after the initial power-up, the STOP bit
(ST) should be written to a '1,' then immediately reset to '0.'
●
●
●
If the oscillator fail interrupt enable bit (OFIE) is set to a '1,' the IRQ pin will also be activated.
The IRQ output is cleared by resetting the OFIE or OF bit to '0' (NOT by reading the flag
register).
The OF bit will remain set to '1' until written to logic '0.' The oscillator must start and have
run for at least 4 seconds before attempting to reset the OF bit to '0.' If the trigger event
occurs during a power-down condition, this bit will be set correctly.
The first time power is applied (defaults to a '1' on power-up).
The voltage present on V
The ST bit is set to '1.'
External interference of the crystal
Table 10 on page 30
Doc ID 10397 Rev 15
CC
or battery is insufficient to support oscillation.
for additional explanation.
Clock operation
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