PCA8565TS/1,118 NXP Semiconductors, PCA8565TS/1,118 Datasheet - Page 21

• Manufacturer Part Number: PCA8565TS/1,118
• Description: IC CMOS RTC/CALENDAR 8-TSSOP
• Manufacturer: NXP Semiconductors
• Type: Clock/Calendarr

Specifications of PCA8565TS/1,118

• Package / Case: 8-TSSOP
• Time Format: HH:MM:SS (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-1902-2; 935272132118; PCA8565TS-T

NXP Semiconductors
10. Characteristics of the I
PCA8565_2
Product data sheet
10.1 Bit transfer
10.2 START and STOP conditions
10.3 System configuration
The I
The two lines are a Serial Data Line (SDA) and a Serial Clock Line (SCL). Both lines must
be connected to a positive supply via a pull-up resistor. Data transfer may be initiated only
when the bus is not busy.
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as a control signal (see
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line, while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P), see
A device generating a message is a transmitter, a device receiving a message is the
receiver. The device that controls the message is the master and the devices which are
controlled by the master are the slaves (see
Fig 13. Bit transfer
Fig 14. Definition of START and STOP conditions
2
C-bus is for bidirectional, two-line communication between different ICs or modules.
SDA
SCL
START condition
2
SDA
SCL
Figure
C-bus
S
Rev. 02 — 16 June 2009
14.
data valid
data line
stable;
Figure
Figure
change
allowed
of data
13).
15).
STOP condition
Real time clock/calendar
mbc621
P
PCA8565
© NXP B.V. 2009. All rights reserved.
mbc622
SDA
SCL
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