ICM7555CN,602 NXP Semiconductors, ICM7555CN,602 Datasheet - Page 12
![IC CMOS TIMER GEN-PURPOSE 8-DIP](/photos/6/57/65748/568-8-dip_sot97-1_sml.jpg)
ICM7555CN,602
Manufacturer Part Number
ICM7555CN,602
Description
IC CMOS TIMER GEN-PURPOSE 8-DIP
Manufacturer
NXP Semiconductors
Type
555 Type, Timer/Oscillator (Single)r
Datasheet
1.ICM7555CD01118.pdf
(22 pages)
Specifications of ICM7555CN,602
Frequency
500kHz
Voltage - Supply
3 V ~ 16 V
Current - Supply
180µA
Operating Temperature
0°C ~ 70°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Count
-
Other names
568-1191-5
933975600602
ICM7555CN
933975600602
ICM7555CN
NXP Semiconductors
ICM7555_2
Product data sheet
11.4 Astable operation
11.5 Monostable operation
If the circuit is connected as shown in
multivibrator. The external capacitor charges through R
R
this mode of operation, the capacitor charges and discharges between
2
supply voltage, the frequency of oscillation is independent of the supply voltage.
In this mode of operation, the timer functions as a one-shot. Initially, the external
capacitor (C) is held discharged by a transistor inside the timer. Upon application of a
negative pulse to pin 2, TRIGGER, the internal flip-flop is set, which releases the
low-impedance on DISCHARGE; the external capacitor charges and drives the OUTPUT
HIGH. The voltage across the capacitor increases exponentially with a time constant
t = R
flip-flop, which in turn discharges the capacitor rapidly and also drives the OUTPUT to its
LOW state. TRIGGER must return to a HIGH state before the OUTPUT can return to a
LOW state.
f
3
Fig 15. Astable operation
B
=
=
V
only. Thus, the duty cycle ( ) may be precisely set by the ratio of these two resistors. In
DD
A
---------------------- -
R
------------------------------------- -
R
C. When the voltage across the capacitor equals
R
A
. Since the charge rate and the threshold levels are directly proportional to the
A
A
+
+
+
2R
1.38
R
2R
OUTPUT
B
B
B
C
Rev. 02 — 3 August 2009
V
DD
R A
R B
C
V
DD
1
2
3
4
Figure
GND
TRIGGER
OUTPUT
RESET
15, it will trigger itself and free run as a
CONTROL_VOLTAGE
THRESHOLD
DISCHARGE
A
2
3
and R
General purpose CMOS timer
V+, the comparator resets the
V
DD
B
and discharges through
8
7
6
5
© NXP B.V. 2009. All rights reserved.
ICM7555
1
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V
V
DD
DD
and
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