MPC9229AC Freescale Semiconductor, MPC9229AC Datasheet - Page 6

• Manufacturer Part Number: MPC9229AC
• Description: IC PECL CLOCK SYNTHESIZER 32LQFP
• Manufacturer: Freescale Semiconductor
• Type: Clock/Frequency Synthesizer, Clock Generatorr

Specifications of MPC9229AC

• Pll: Yes with Bypass
• Input: LVCMOS
• Output: LVCMOS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 1:1
• Differential - Input:output: Yes/Yes
• Frequency - Max: 400MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MPC9229
Programming the MPC9229
configuring the internal PLL dividers to produce the desired
synthesized frequency at the output. The output frequency
can be represented by this formula:
f
f
feedback-divider and N is the PLL post-divider. The input
frequency and the selection of the feedback divider M is limited
by the VCO-frequency range. f
OUT
OUT
Table 7. MPC9229 Frequency Operating Range
MOTOROLA
Programming
where f
160
170
180
190
200
210
220
230
240
250
260
270
280
290
300
310
320
330
340
350
360
370
380
390
400
410
420
430
440
450
510
M
= (f
= (f
XTAL
XTAL
XTAL
010100000
010101010
010110100
011001000
011010010
100000100
100001110
100011000
100100010
100101100
100110110
101000000
101001010
101010100
101101000
101110010
110000110
110010000
110011010
110100100
111000010
010111110
011011100
011100110
011110000
011111010
101011110
101111100
110101110
110111000
111111110
÷ 16) ⋅ (4 ⋅ M) ÷ (4 ⋅ N) or
÷ 16) ⋅ M ÷ N
M[8:0]
is the crystal frequency, M is the PLL
the
MPC9229
1000
1025
1050
1075
1100
1125
1275
VCO frequency for an crystal interface frequency of
800
825
850
875
900
925
950
975
10
XTAL
and M must be configured
1020
1050
1080
1200
1230
1260
1290
1320
1350
1530
1110
1140
1170
810
840
870
900
930
960
990
Freescale Semiconductor, Inc.
amounts
12
For More Information On This Product,
1015
1050
1085
1225
1260
1295
1330
1365
1400
1435
1470
1505
1540
1575
1120
1155
1190
805
840
875
910
945
980
14
to
Go to: www.freescale.com
properly
1040
1080
1200
1240
1280
1320
1360
1400
1440
1480
1520
1560
1600
1120
1160
800
840
880
920
960
100
16
(1)
(2)
1035
1080
1215
1260
1305
1350
1395
1440
1485
1530
1575
1125
1170
6
810
855
900
945
990
18
to match the VCO frequency range of 800 to 1600 MHz in
order to achieve stable PLL operation:
M
M
the configuration of the PLL feedback divider between M=200
and M = 400. Table 7 shows the usable VCO frequency and
M divider range for other example input frequencies.
Assuming that a 16 MHz input frequency is used, equation (2)
reduces to:
f
OUT
MIN
MAX
For instance, the use of a 16 MHz input frequency requires
= M ÷ N
1000
1050
1200
1250
1300
1350
1400
1450
1500
1550
1600
1100
1150
= 4⋅f
800
850
900
950
= 4⋅f
20
VCO,MIN
VCO,MAX
Output frequency for f
200
210
220
230
240
250
260
270
280
290
300
310
320
330
340
350
360
370
380
390
400
1
÷ f
÷ f
XTAL
XTAL
and
100
105
120
125
130
135
140
145
150
155
160
165
170
175
180
185
190
195
200
110
115
2
XTAL
=16 MHz and for N =
52.5
57.5
62.5
67.5
72.5
77.5
82.5
87.5
92.5
97.5
TIMING SOLUTIONS
100
50
55
60
65
70
75
80
85
90
95
4
26.25
27.50
28.75
31.25
32.50
33.75
36.25
38.75
41.25
43.75
46.25
48.75
37.5
42.5
47.5
16
25
30
35
40
45
50
(3)
(4)
(5)