LMX2353SLBX National Semiconductor, LMX2353SLBX Datasheet - Page 2

• Manufacturer Part Number: LMX2353SLBX
• Description: IC FREQ SYNTH 2.5GHZ 16LAMCSP
• Manufacturer: National Semiconductor
• Series: PLLatinum™r
• Type: PLL Frequency Synthesizerr

Specifications of LMX2353SLBX

• Pll: Yes with Bypass
• Input: CMOS, TTL
• Output: CMOS
• Number Of Circuits: 1
• Ratio - Input:output: 2:1
• Differential - Input:output: Yes/No
• Frequency - Max: 2.5GHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-Laminate CSP
• Frequency-max: 2.5GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LMX2353SLBX/NOPB; LMX2353SLBXTR

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Connection Diagrams
Pin Description
CSP
16
10
11
12
13
14
15
1
2
3
4
5
6
7
8
9
Pin No.
TSSOP
See NS Package Number MTC16
Order Number LMX2353TM or
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
LMX2353TMX
OSC
TOP VIEW
Name
DATA
OUT1
OUT0
GND
GND
F
GND
CP
CLK
V
Pin
f
CE
LE
V
o
f
INB
IN
CC
LD
P
O
IN
I/O
—
—
—
—
—
—
—
O
O
I
I
I
I
I
I
I
DS101124-2
Power supply for charge pump. Must be
Charge pump output. Connected to a loop filter for driving the control input of an
external VCO.
Ground for PLL digital circuitry.
RF prescaler input. Small signal input from the VCO.
RF prescaler complimentary input. A bypass capacitor should be placed as close
as possible to this pin and be connected directly to the ground plane.
Ground for PLL analog circuitry.
Oscillator input. A CMOS inverting gate input. The input has a V
Multiplexed output of N or R divider and lock detect. CMOS output.
PLL Enable. Powers down N and R counters, prescalers, and TRI-STATE
PLL power supply voltage input. May range from 2.7V to 5.5V. Bypass capacitors
should be placed as close as possible to this pin and be connected directly to the
ground plane.
Programmable CMOS output. Level of the output is controlled by F2[18] bit.
Programmable CMOS output. Level of the output is controlled by F2[17] bit.
threshold and can be driven from an external CMOS or TTL logic gate.
pump output when LOW. Bringing CE high powers up PLL depending on the state
of CTL_WORD.
High impedance CMOS Clock input. Data for the various counters is clocked into
the 24-bit shift register on the rising edge.
Binary serial data input. Data entered MSB first. The last two bits are the control
bits. High impedance CMOS input.
Load enable high impedance CMOS input. Data stored in the shift registers is
loaded into one of the 4 internal latches when LE goes HIGH.
Ground.
2
See NS Package Number SLB16A
Order Number LMX2353SLBX
Description
TOP VIEW
V
CC
.
DS101124-3
CC
/2 input
®
charge