NB2308AI1DR2G ON Semiconductor, NB2308AI1DR2G Datasheet

NB2308AI1DR2G

Manufacturer Part Number

NB2308AI1DR2G

Description

IC BUFFER CLK 8OUT 3.3V 16-SOIC

Manufacturer

ON Semiconductor

Type

Zero Delay Bufferr

Datasheet

1.NB2308AI1DR2G.pdf (12 pages)

Specifications of NB2308AI1DR2G

Pll

Yes with Bypass

Input

Clock

Output

Clock

Number Of Circuits

Ratio - Input:output

1:8

Differential - Input:output

No/No

Frequency - Max

133.3MHz

Divider/multiplier

No/No

Voltage - Supply

3 V ~ 3.6 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

16-SOIC (3.9mm Width)

Frequency-max

133MHz

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

NB2308AI1DR2G

Manufacturer:

ON Semiconductor

Quantity:

1 900

Current page: 1 of 12
Download datasheet (190Kb)

NB2308A

3.3 V Zero Delay

Clock Buffer

distribute high- -speed clocks. It is available in a 16 pin package. The

part has an on- -chip PLL which locks to an input clock presented on

the REF pin. The PLL feedback is required to be driven to FBK pin,

and can be obtained from one of the outputs. The input- -to- -output

propagation delay is guaranteed to be less than 250 ps, and the

output- -to- -output skew is guaranteed to be less than 200 ps.

controlled by the select inputs as shown in the Select Input Decoding

Table. If all the output clocks are not required, Bank B can be

three- -stated. The select input also allows the input clock to be directly

applied to the outputs for chip and system testing purposes.

distribute it. In this case the skew between the outputs of the two

devices is guaranteed to be less than 700 ps.

NB2308A Configurations Table). The NB2308AI1 is the base part,

where the output frequencies equal the reference if there is no counter

in the feedback path. The NB2308AI1H is the high- -drive version of

the - -1 and the rise and fall times on this device are much faster.

each output bank. The exact configuration and output frequencies

depends on which output drives the feedback pin. The NB2308AI3

allows the user to obtain 4X and 2X frequencies on the outputs.

Thus, the part is extremely versatile, and can be used in a variety of

applications.

banks.

Features



 Semiconductor Components Industries, LLC, 2010

October, 2010 - - Rev. 8

The NB2308A is a versatile, 3.3 V zero delay buffer designed to

The NB2308A has two banks of four outputs each, which can be

Multiple NB2308A devices can accept the same input clock and

The NB2308A is available in five different configurations (Refer to

The NB2308AI2 allows the user to obtain 2X and 1X frequencies on

The NB2308AI4 enables the user to obtain 2X clocks on all outputs.

The NB2308AI5H is a high- -drive version with REF/2 on both

Load on FBK Input

Zero Input - - Output Propagation Delay, Adjustable by Capacitive

Multiple Configurations - - Refer to NB2308A Configurations Table

Input Frequency Range: 15 MHz to 133 MHz

Multiple Low- -Skew Outputs

Output- -Output Skew Less than 200 ps

Device- -Device Skew Less than 700 ps

Two banks of four outputs, three- -stateable by two select inputs

Less than 200 ps Cycle- -to- -Cycle Jitter

Available in 16- -pin SOIC and TSSOP Packages

3.3 V Operation

Guaranteed Across Commercial and Industrial Temperature Ranges

Advanced 0.35 m CMOS Technology

These are Pb- -Free Devices

*For additional marking information, refer to

See detailed ordering and shipping information in the package

dimensions section on page 9 of this data sheet.

Application Note AND8002/D.

CASE 751B

CASE 948F

TSSOP- -16

DT SUFFIX

D SUFFIX

SOIC- -16

XXXX

WL, L

WW, W = Work Week

G or G

(Note: Microdot may be in either location)

ORDERING INFORMATION

= Device Code

= Assembly Location

= Wafer Lot

= Year

= Pb--Free Package

http://onsemi.com

Publication Order Number:

XXXXXXXXXG

DIAGRAMS*

MARKING

AWLYWW

ALYWG

XXXX

NB2308A/D

Related parts for NB2308AI1DR2G

NB2308AI1DR2G Summary of contents

Page 1

NB2308A 3.3 V Zero Delay Clock Buffer The NB2308A is a versatile, 3.3 V zero delay buffer designed to distribute high- -speed clocks available pin package. The part has an on- -chip PLL which locks ...

Page 2

REF ÷2 Extra Divider (--5H (see Figures 11, 12, 13, 14 and 15 for device specific Block Diagrams) Table 1. CONFIGURATIONS Device Feedback From NB2308AI1 Bank A or Bank B NB2308AI1H Bank A or Bank B NB2308AI2 Bank ...

Page 3

Table 3. PIN DESCRIPTION Pin # Pin Name 1 REF (Note 3) 2 CLKA1 (Note 4) 3 CLKA2 (Note GND 6 CLKB1 (Note 4) 7 CLKB2 (Note (Note (Note ...

Page 4

Table 4. MAXIMUM RATINGS Parameter Supply Voltage to Ground Potential DC Input Voltage (Except REF) DC Input Voltage (REF) Storage Temperature Maximum Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (per MIL--STD--883, Method 3015) Stresses exceeding Maximum Ratings may ...

Page 5

Table 7. SWITCHING CHARACTERISTICS Parameter Description t Output Frequency 1 t Duty Cycle = ( 100 (all devices) t Output Rise Time 3 (--1, --2, --3, --4) Output Rise Time (--1H, --5H) t ...

Page 6

Zero Delay and Skew Control All outputs should be uniformly loaded to achieve Zero Delay between input and output. 1500 1000 500 0 --500 --1000 --1500 --30 --25 --20 --15 --10 -- OUTPUT LOAD DIFFERENCE: FBK LOAD -- ...

Page 7

V CLKOUT DD OUTPUTS 0 0.1 mF GND GND Figure 9. Test Circuit #1 PLL MUX REF S2 SELECT INPUT DECODING S1 Figure 11. NB2308AI1 and NB2308AI1H TEST CIRCUITS 0 LOAD 0.1 mF For parameter ...

Page 8

MUX PLL REF S2 SELECT INPUT DECODING ÷2 S1 Figure 13. NB2308AI3 REF S2 S1 BLOCK DIAGRAMS FBK CLKA1 ÷2 CLKA2 CLKA3 REF CLKA4 S2 SELECT INPUT S1 CLKB1 CLKB2 CLKB3 CLKB4 MUX PLL ÷2 SELECT INPUT DECODING Figure ...

Page 9

... ORDERING INFORMATION Device Marking NB2308AI1DG 2308AI1G NB2308AI1DR2G 2308AI1G NB2308AI1HDG 2308AI1HG NB2308AI1HDR2G 2308AI1HG NB2308AI1DTG 2308 AI1 NB2308AI1DTR2G 2308 AI1 NB2308AI1HDTG 2308 AI1H NB2308AI1HDTR2G 2308 AI1H NB2308AI2DG 2308AI2G NB2308AI2DR2G 2308AI2G NB2308AI2DTG 2308 AI2 NB2308AI2DTR2G 2308 AI2 NB2308AI2HDG 2308AI2HG NB2308AI2HDR2G 2308AI2HG NB2308AI2HDTG 2308 AI2H ...

Page 10

ORDERING INFORMATION Device Marking NB2308AI5HDG 2308AI5HG NB2308AI5HDR2G 2308AI5HG NB2308AI5HDTG 2308 AI5H NB2308AI5HDTR2G 2308 AI5H †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Spe- cifications Brochure, BRD8011/D. Operating ...

Page 11

... L PIN 1 IDENT. 1 0.15 (0.006 - 0.10 (0.004) - -T- - SEATING D PLANE 16X 0.36 *For additional information on our Pb--Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP- -16 CASE 948F--01 ISSUE SECTION - 0.25 (0.010 ...

Page 12

... *For additional information on our Pb--Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “ ...

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