CY29973AI Cypress Semiconductor Corp, CY29973AI Datasheet
CY29973AI
Specifications of CY29973AI
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CY29973AI Summary of contents
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... Note the reference input frequency, 200 MHz < F Cypress Semiconductor Corporation Document #: 38-07291 Rev. *C 3.3V 125-MHz Multi-Output Zero Delay Buffer ■ Spread Spectrum Compatible ■ Glitch-free Output Clocks Transitioning ■ 3.3V Power Supply ■ Pin Compatible with MPC973 ■ Industrial Temperature Range: - 40°C to +85°C ■ ...
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Logic Block Diagram PECL_CLK PECL_CLK# VCO_SEL PLL_EN REF_SEL TCLK0 TCLK1 TCLK_SEL FB_IN FB_SEL2 MR#/OE SELA(0,1) SELB(0,1) SELC(0,1) FB_SEL(0,1) SCLK SDATA INV_CLK Pinouts PECL_CLK# Document #: 38-07291 Rev. *C Phase 0 VCO 0 1 Detector 1 LPF Power-On Reset /4, /6, ...
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Pin Definitions [2] Pin Name PWR 11 PECL_CLK 12 PECL_CLK# 9 TCLK0 10 TCLK1 44, 46, 48, 50 QA(3:0) VDDC 32, 34, 36, 38 QB(3:0) VDDC 16, 18, 21, 23 QC(3:0) VDDC 29 FB_OUT VDDC 25 SYNC VDDC 42, 43 ...
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Description The CY29973 has an integrated PLL that provides low-skew and low-jitter clock outputs for high-performance microprocessors. Three independent banks of four outputs and an independent PLL feedback output, FB_OUT, provide exceptional flexibility for possible output configurations. The PLL is ...
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SYNC Output In situations were output frequency relationships are not integer multiples of each other the SYNC output provides a signal for system synchronization. The CY29973 monitors the relationship between the QA and the QC output clocks. It provides a ...
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Power Management The individual output enable or freeze control of the CY29973 allows the user to implement unique power management schemes into the design. The outputs are stopped in the logic ‘0’ state when the freeze control bits are activated. ...
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... TCLK1 Ordering Information Part Number [12] CY29973AI [12] 52-pin TQFP– Tape and reel CY29973AIT Pb-Free CY29973AXI CY29973AXIT 52-pin TQFP – Tape and reel Notes 7. Parameters are guaranteed by design and characterization. Not 100% tested in production. 8. Maximum and minimum input reference is limited by VC0 lock range. ...
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Package Drawing and Dimensions Figure 3. 52-Pin Thin Plastic Quad Flat Pack ( 1.0 mm) A52B Document #: 38-07291 Rev. *C CY29973 51-85158-** Page [+] Feedback ...
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... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...