LMX2541SQE3030E/NOPB National Semiconductor, LMX2541SQE3030E/NOPB Datasheet - Page 37

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LMX2541SQE3030E/NOPB

Manufacturer Part Number
LMX2541SQE3030E/NOPB
Description
IC PLL FREQ SYNTH W/VCO 36LLP
Manufacturer
National Semiconductor
Series
PowerWise®r
Type
Clock/Frequency Synthesizer (RF)r
Datasheet

Specifications of LMX2541SQE3030E/NOPB

Pll
Yes
Input
Clock
Output
Clock
Number Of Circuits
1
Ratio - Input:output
2:2
Differential - Input:output
No/No
Frequency - Max
3.23GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.15 V ~ 3.45 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-LLP
Frequency-max
3.23GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LMX2541SQE3030ETR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LMX2541SQE3030E/NOPB
Manufacturer:
NS
Quantity:
488
2.0 General Programming Information
The LMX2541 is programmed using several 32-bit registers used to control the LMX2541 operation. A 32-bit shift register is used
as a temporary register to indirectly program the on-chip registers. The shift register consists of a data field and an address field.
The last 4 register bits, CTRL[3:0] form the address field, which is used to decode the internal register address. The remaining 28
bits form the data field DATA[27:0]. While LE is low, serial data is clocked into the shift register upon the rising edge of clock (data
is programmed MSB first). When LE goes high, data is transferred from the data field into the selected register bank. For initial
device programming the register programming sequence must be done in the order as shown in the register map. The action of
programming register R7 and bringing LE low resets all the registers to default values, including hidden registers. The programming
of register R0 is also special for the device when operating in full chip mode because the action of programming either one of these
registers activates the VCO calibration.
In addition to changing the values of various words, the programming of certain registers triggers certain events as described in
the table below:
Programming
Event
Action of
programming
register R7 and
bring LE low
Action of
programming
register R0 and
bringing LE low
Action of
programming
register R4
Event Triggered
Resets all registers,
including hidden
ones, to a default
state
Activates the VCO
calibration
Synchronizes the
VCO Divider
Configurations
Where it Has an
Impact
All
Only in Full Chip
Mode
Only when the
RFout pin ins
enabled and the
VCO divider is set to
4 or 5
37
Significance
This needs to be the first programming step for all configurations.
If register R7 is ever programmed again, all programming
information will be reset to the default state.
The VCO calibration tunes the VCO to the correct frequency
band and optimizes the phase noise. It is necessary whenever
the internal VCO frequency is changed. Also, if the temperature
drifts considerably, then this calibration can better optimize the
phase noise.
Consult the functional description for more details.
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