LMX2541SQE2060E/NOPB National Semiconductor, LMX2541SQE2060E/NOPB Datasheet - Page 33

• Manufacturer Part Number: LMX2541SQE2060E/NOPB
• Description: IC PLL FREQ SYNTH W/VCO 36LLP
• Manufacturer: National Semiconductor
• Series: PowerWise®r
• Type: Clock/Frequency Synthesizer (RF)r

Specifications of LMX2541SQE2060E/NOPB

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 2:2
• Differential - Input:output: No/No
• Frequency - Max: 2.24GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-LLP
• Frequency-max: 2.24GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LMX2541SQE2060ETR

OSCin INPUT SENSITIVITY TEST SETUP
Input Sensitivity Test Procedure
There are two things that are important to consider when
measuring the OSCin sensitivity.
•
•
Because of these considerations, the OSCin sensitivity needs
to be measured in a closed loop test in such a way that the
internal frequency calibration is not distorting the measure-
ment. To do this, a known frequency and power level are set
at the OSCin pin and the power level is changed until the PLL
becomes more than 1 ppm off frequency. The PLL_R divider
is varied to maintain a phase detector frequency of 1 MHz to
ensure that the PLL loop does not become unstable. The fre-
quency counter needs to be synchronized in frequency to the
signal generator. It is better to use a narrower loop bandwidth
for this test because the phase noise of the PLL might de-
grade when the OSCin power level gets to close to the sen-
sitivity limits. Typically, a 0.1 uF capacitor is used as a DC
block for the signal at the OSCin pin. The sensitivity at the
OSCin pin is measured with a single-ended input.
The action of setting the Ftest/LD pin to monitor the R
divider output degrades the OSCin sensitivity.
The internal VCO frequency calibration is based on the
OSCin signal
33
This test can be run in internal VCO mode (MODE=0) or ex-
ternal VCO mode (MODE=1). When doing the test in internal
VCO mode, the part needs to be initially locked and then the
R counter is programmed to adjust for the OSCin frequency.
However, in internal VCO mode, the PLL_N counter can not
be programmed, because the action of programming this
counter activates the internal VCO frequecy calibration, which
can interfere with the test.
OSCin Slew Rate Tests
There are two methods that can be used to test the OSCin
slew rate. One method is to use test equipment that actually
allows the user to vary the slew rate directly, but this type of
equipment typically does not give the user enough range of
adjustability. Another method is to calculate the slew rate
based on the slope of a sine wave of known frequency and
amplitude. For this method, the slew rate can be calculated
from the frequency and peak to peak amplitude of the OSCin
signal as follows: Slew
OSCin
= 2 ×
π
× f
OSCin
× Vpp
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OSCin