LMK02000ISQ/NOPB National Semiconductor, LMK02000ISQ/NOPB Datasheet - Page 6

• Manufacturer Part Number: LMK02000ISQ/NOPB
• Description: IC CLOCK CONDITIONER PREC 48-LLP
• Manufacturer: National Semiconductor
• Type: Clock Conditionerr

Specifications of LMK02000ISQ/NOPB

• Pll: Yes
• Input: Clock
• Output: LVDS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 2:8
• Differential - Input:output: Yes/Yes
• Frequency - Max: 800MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LLP
• Frequency-max: 800MHz
• For Use With: LMK02000EVAL-1 - BOARD EVAL WITH 245.76 VCXOLMK02000EVAL2 - BOARD EVALUATION FOR LMK02000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LMK02000ISQ; LMK02000ISQTR

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Jitter
t
V
V
V
V
V
I
I
V
V
V
V
I
I
t
t
t
t
t
t
t
SKEW
IH
IL
IH
IL
CS
CH
CWH
CWL
ES
CES
EWH
OH
OL
OD
IH
IL
OH
OL
IH
IL
Note 4: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified
or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.
Note 5: See 3.4 for more current consumption / power dissipation calculation information.
Note 6: For all frequencies the slew rate, SLEW
Note 7: A specification in modeling PLL in-band phase noise is the 1/f flicker noise, L
dB/decade slope. PN10kHz is normalized to a 10 kHz offset and a 1 GHz carrier frequency. PN10kHz = L
(f) is the single side band phase noise of only the flicker noise's contribution to total noise, L(f). To measure L
slope close to the carrier. A high phase detector frequency and a clean crystal are important to isolating this noise source from the total phase noise, L(f). L
(f) can be masked by the reference oscillator performance if a low power or noisy source is used. The total PLL inband phase noise performance is the sum of
L
Note 8: A specification in modeling PLL in-band phase noise is the Normalized Phase Noise Contribution, L
L
detector frequency of the synthesizer. L
smaller then the loop bandwidth of the PLL, and yet large enough to avoid a substantial noise contribution from the reference and flicker noise. L
masked by the reference oscillator performance if a low power or noisy source is used.
Note 9: The Clock Distribution Section includes all parts of the device except the PLL section. Typical Additive Jitter specifications apply to the clock distribution
section only.
Note 10: Specification is guaranteed by characterization and is not tested in production.
Note 11: Applies to GOE, LD, and SYNC*.
Symbol
PLL_flicker
PLL_flat
ADD
(f) – 20log(N) – 10log(f
(f) and L
Additive RMS Jitter (Note 9)
CLKoutX to CLKoutY (Note 10)
Output High Voltage
Output Low Voltage
Differential Output Voltage
High-Level Input Voltage
Low-Level Input Voltage
High-Level Input Current
Low-Level Input Current
High-Level Output Voltage
Low-Level Output Voltage
High-Level Input Voltage
Low-Level Input Voltage
High-Level Input Current
Low-Level Input Current
Data to Clock Set Up Time
Data to Clock Hold Time
Clock Pulse Width High
Clock Pulse Width Low
Clock to Enable Set Up Time
Enable to Clock Set Up Time
Enable Pulse Width High
PLL_flat
(f).
Clock Distribution Section (Note 9) - LVPECL Clock Outputs (CLKout3 to CLKout7)
COMP
). L
Parameter
PLL_flat
PLL_flat
(f) is the single side band phase noise measured at an offset frequency, f, in a 1 Hz Bandwidth and f
(f) contributes to the total noise, L(f). To measure L
Fin
, is measured between 20% and 80%.
Digital MICROWIRE Interfaces (Note 12)
Digital LVTTL Interfaces (Note 11)
MICROWIRE Timing
R
Distribution Path =
800 MHz
Bandwidth =
12 kHz to 20 MHz
Equal loading and identical clock
configuration
Termination = 50 Ω to Vcc - 2 V
Termination = 50 Ω to Vcc - 2 V
V
V
I
I
V
V
See Data Input Timing
See Data Input Timing
See Data Input Timing
See Data Input Timing
See Data Input Timing
See Data Input Timing
See Data Input Timing
OH
OL
IH
IL
IH
IL
L
= 100 Ω
= -500 µA
= 0
= 0
= Vcc
= +500 µA
= Vcc
6
PLL_flicker
Conditions
(f), which is dominant close to the carrier. Flicker noise has a 10
CLKoutX_MUX
= Bypass
CLKoutX_MUX
= Divided
CLKoutX_DIV =
4
PLL_flat
(f) the offset frequency, f, must be chosen sufficiently
PLL_flicker
PLL_flat
PLL_flicker
(10 kHz) - 20log(Fout / 1 GHz), where L
(f), of the PLL and is defined as PN1Hz =
(f) it is important to be on the 10 dB/decade
-40.0
Vcc -
Min
-5.0
-5.0
-5.0
660
-30
2.0
0.4
1.6
25
25
25
25
25
25
8
Vcc -
Vcc -
0.98
Typ
810
1.8
±3
20
75
COMP
Max
965
Vcc
Vcc
PLL_flat
0.8
5.0
5.0
0.4
0.4
5.0
5.0
30
is the phase
(f) can be
PLL_flicker
PLL_flicker
Units
mV
µA
µA
µA
µA
ps
ns
ns
ns
ns
ns
ns
ns
fs
V
V
V
V
V
V
V
V