MC100LVE111FN ON Semiconductor, MC100LVE111FN Datasheet - Page 5

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MC100LVE111FN

Manufacturer Part Number
MC100LVE111FN
Description
IC CLOCK DRIVER 1:9 DIFF 28-PLCC
Manufacturer
ON Semiconductor
Series
100LVEr
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of MC100LVE111FN

Number Of Circuits
1
Ratio - Input:output
1:9
Differential - Input:output
Yes/Yes
Input
ECL, PECL
Output
ECL, PECL
Frequency - Max
1.5GHz
Voltage - Supply
3 V ~ 3.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-PLCC
Frequency-max
1.5GHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
8. V
9. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the
10. The single−ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal.
11. The within−device skew is defined as the worst case difference between any two similar delay paths within a single device.
12. V
Table 6. AC CHARACTERISTICS
Symbol
f
t
t
t
t
V
t
max
PLH
PHL
skew
JITTER
r
/t
PP
differential output signals.
for the E111 as a differential input as low as 50 mV will still produce full ECL levels at the output.
f
PP
EE
(min) is defined as the minimum input differential voltage which will cause no increase in the propagation delay. The V
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
can vary ±0.3 V.
Maximum Toggle Frequency
Propagation Delay to Output
Within−Device Skew (Note 11)
Part−to−Part Skew
(Differential Configuration)
Cycle−to−Cycle Jitter
Input Swing (Note 12)
Output Rise/Fall Time (20%−80%)
IN (Differential Configuration) (Note 9)
sIN (Single−Ended) (Note 10)
Characteristic
900
800
700
600
500
400
300
200
100
É É É É É É É É É É É É É É É É
É É É É É É É É É É É É É É É É
É É É É É É É É É É É É É É É É
0
0
V
300
CC
= 3.3 V; V
600
EE
Figure 3. F
Min
400
350
500
200
= 0 V or V
http://onsemi.com
900
FREQUENCY (MHz)
−40°C
(JITTER)
> 1.5
Typ
0.2
1200
CC
5
max
= 0 V; V
/Jitter
1000
Max
650
700
250
600
< 1
50
1500
EE
= −3.3 V (Note 8)
Min
440
390
500
200
1800
25°C
> 1.5
Typ
0.2
2100
1000
Max
630
680
200
600
< 1
50
2400
9
8
7
6
5
4
3
2
1
Min
445
395
500
200
É É
É É É É
85°C
> 1.5
Typ
0.2
PP
(min) is AC limited
1000
Max
635
685
200
600
< 1
50
GHz
Unit
mV
ps
ps
ps
ps

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