SY89823LHI Micrel Inc, SY89823LHI Datasheet - Page 4

• Manufacturer Part Number: SY89823LHI
• Description: IC BUFFER/XLATOR HSTL FAN 64TQFP
• Manufacturer: Micrel Inc
• Type: Fanout Buffer (Distribution), Multiplexer , Translatorr
• Series: Precision Edge®r

Specifications of SY89823LHI

• Number Of Circuits: 1
• Ratio - Input:output: 2:22
• Differential - Input:output: Yes/Yes
• Input: HSTL, LVPECL
• Output: HSTL
• Frequency - Max: 500MHz
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP Exposed Pad, 64-eTQFP, 64-HTQFP, 64-VQFP
• Frequency-max: 500MHz
• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 500MHz
• Output Logic Level: HSTL
• Operating Supply Voltage (min): 3.15V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.45V
• Package Type: TQFP EP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: HSTL/LVPECL
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Micrel, Inc.
LVCMOS/LVTTL V
Symbol
V
V
I
I
V
Symbol
f
t
t
t
V
V
t
t
t
t
Notes:
5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
6. High-frequency AC-parameters are guaranteed by design and characterization.
7. Differential propagation delay is defined as the delay from the crossing point of the differential input signals to the crossing point of the
8. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device operating at the
9. The part-to-part skew is defined as the absolute worst case difference between any two delay paths on any two devices operating at the same
10. The V
11. V
12. OE set-up time is defined with respect to the rising edge of the clock. OE HIGH to LOW transition ensures outputs remain disabled during the
13. Cycle-to-cycle jitter definition: The variation of periods between adjacent cycles, T
M9999-091908
[e-mail] or [phone]
IH
IL
MAX
pd
SKEW
SKPP
S
H
r
JITTER
, t
IH
IL
CCI
pp
CMR
AC ELECTRICAL CHARACTERISTICS
DC ELECTRICAL CHARACTERISTICS
f
differential output signals.
same voltage and temperature.
voltage and temperature.
numbers in the table are referenced to V
equal to V
next clock cycle. OE LOW-to-HIGH transition enables normal operation of the next input clock.
output signal.
CMR
= 3.3V
PP
is defined as the range within which the V
(min) is defined as the minimum input differential voltage which will cause no increase in the propagation delay.
PP
5%; V
(min). The lower end of the CMR range varies 1:1 with V
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Parameter
Maximum Operating Frequency
Propagation Delay
Within-Device Skew
Part-to-Part Skew
Minimum Input Swing
LVPECL_CLK
Common Mode Range
LVPECL_CLK
OE Set-Up Time
OE Hold Time
Output Rise/Fall Time (20% – 80%)
Cycle-to-Cycle Jitter
CCI
CCO
= 3.3V
= 1.8V
5%; V
10%; All outputs loaded with 50 to GND; T
CCO
CCI
CLK-to-Q
SEL-to-Q
. The V
= 1.8V
IH
level may vary, with the device still meeting the propagation delay specification. The
IL
level must be such that the peak-to-peak voltage is less than 1.0V and greater than or
(6)
10%; T
Condition
Condition
V
Note 7
Note 7
Note 8
Note 9
Note 10
Note 11
Note 12
Note 13
OUT
(5)
A
= –40 C to +85 C, unless otherwise stated.
450mV
CCI
4
. The V
CMR
n
–T
(min) will be fixed at 3.3V – |V
A
n–1
= –40 C to +85 C, unless otherwise stated.
where T is the time between rising edges of the
–1.5
Min
Min
+20
500
600
300
2.0
0.8
0.8
1.0
0.5
—
—
—
—
CMR
(min)|.
Typ
Typ
1.2
—
—
—
—
—
—
—
—
—
—
—
—
—
Precision Edge
–250
–600
Max
Max
–0.4
200
700
0.8
1.3
1.7
50
—
—
—
—
—
1
SY89823L
ps
Units
Units
MHz
mV
ns
ns
ps
ps
ns
ns
ps
RMS
V
V
V
A
A
®