NB6L11MMNG ON Semiconductor, NB6L11MMNG Datasheet

IC FANOUT BUFFER DIFF CML 16-QFN

NB6L11MMNG

Manufacturer Part Number
NB6L11MMNG
Description
IC FANOUT BUFFER DIFF CML 16-QFN
Manufacturer
ON Semiconductor
Series
ECLinPS MAX™r
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of NB6L11MMNG

Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
Yes/Yes
Input
CML, LVCMOS, LVDS, LVNECL, LVPECL, LVTTL
Output
CML
Frequency - Max
4GHz
Voltage - Supply
2.375 V ~ 3.63 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TFQFN Exposed Pad
Frequency-max
4GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
NB6L11MMNG
Manufacturer:
ON
Quantity:
127
NB6L11M
2.5V / 3.3V 1:2 Differential
CML Fanout Buffer
Multi−Level Inputs w/ Internal Termination
Description
differential inputs incorporate internal 50 W termination resistors that
are accessed through the V
LVTTL, CML, or LVDS logic levels.
to this device only. V
single−ended PECL or NECL inputs. For all single−ended input
conditions, the unused complementary differential input is connected
to V
capacitor−coupled inputs. When used, decouple V
0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA.
When not used, V
high performance clock products.
Features
© Semiconductor Components Industries, LLC, 2009
August, 2009 − Rev. 4
The NB6L11M is a differential 1:2 CML fanout buffer. The
The V
The device is housed in a small 3x3 mm 16 pin QFN package.
The NB6L11M is a member of the ECLinPS MAXt family of
EP, and SG Devices
Maximum Input Clock Frequency > 4 GHz, Typical
225 ps Typical Propagation Delay
70 ps Typical Rise and Fall Times
0.5 ps maximum RMS Clock Jitter
Differential CML Outputs, 380 mV peak−to−peak, typical
LVPECL Operating Range: V
NECL Operating Range: V
Internal Input Termination Resistors, 50 W
VREFAC Reference Output
Functionally Compatible with Existing 2.5 V / 3.3V LVEL, LVEP,
−40°C to +85°C Ambient Operating Temperature
These are Pb−Free Devices
REFAC
REFAC
as a switching reference voltage. V
pin is an internally generated voltage supply available
REFAC
REFAC
output should be left open.
T
pins and will accept LVPECL, LVCMOS,
CC
is used as a reference voltage for
CC
= 0 V with V
= 2.375 V to 3.63 V with V
EE
REFAC
= −2.375 V to −3.63 V
may also rebias
REFAC
1
with a
EE
= 0 V
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
*For additional marking information, refer to
VTD
VTD
Application Note AND8002/D.
Figure 1. Simplified Logic Diagram
A
L
Y
W
G
(Note: Microdot may be in either location)
D
D
ORDERING INFORMATION
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
http://onsemi.com
V
CASE 485G
MN SUFFIX
REFAC
QFN−16
Publication Order Number:
1
DIAGRAM*
16
MARKING
ALYWG
NB6L11M/D
NB6L
11M
G
Q0
Q0
Q1
Q1

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NB6L11MMNG Summary of contents

Page 1

NB6L11M 2.5V / 3.3V 1:2 Differential CML Fanout Buffer Multi−Level Inputs w/ Internal Termination Description The NB6L11M is a differential 1:2 CML fanout buffer. The differential inputs incorporate internal 50 W termination resistors that are accessed through the V pins ...

Page 2

Table 1. PIN DESCRIPTION Pin Name I/O 1 VTD − ECL, CML, LVCMOS, LVDS, LVTTL Input 3 D ECL, CML, LVCMOS, LVDS, LVTTL Input 4 VTD − − REFAC 7 V − EE ...

Page 3

Table 2. ATTRIBUTES ESD Protection Moisture Sensitivity Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS Symbol Parameter V Positive Power Supply CC V Negative ...

Page 4

Table 4. DC CHARACTERISTICS, Multi−Level Inputs −3. −40°C to +85°C A Symbol Characteristic POWER SUPPLY CURRENT I Power Supply Current (Inputs and Outputs Open) CC CML OUTPUTS (Notes 4 and 5) V Output HIGH Voltage OH V ...

Page 5

Table 5. AC CHARACTERISTICS V +85°C; (Note 10) Symbol V Output Voltage Amplitude (@ V OUTPP (Note 15) (See Figure 9) t Propagation Delay PD t Duty Cycle Skew (Note 11) SKEW Within Device Skew Device to Device Skew (Note ...

Page 6

Figure 4. Differential Input Driven Single−Ended D D Figure 6. Differential Inputs Driven Differentially IHD(MAX) V ILD(MAX) V IHD CMR ID V ILD ...

Page 7

LVPECL TD V Driver − Figure 10. LVPECL Interface V CML Driver GND Figure 12. ...

Page 8

... Frequency at Ambient Temperature (Typical) DUT Driver Device Figure 17. Typical CML Termination for Output Driver and Device Evaluation ORDERING INFORMATION Device NB6L11MMNG NB6L11MMNR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/ ...

Page 9

... E2 e 3.25 0.128 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 6,362,644. N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81− ...

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