CY7B991-7JC Cypress Semiconductor Corp, CY7B991-7JC Datasheet - Page 8
![IC CLK BUFF SKEW 8OUT 32PLCC](/photos/6/51/65138/428-32-plcc_sml.jpg)
CY7B991-7JC
Manufacturer Part Number
CY7B991-7JC
Description
IC CLK BUFF SKEW 8OUT 32PLCC
Manufacturer
Cypress Semiconductor Corp
Type
Buffer/Driverr
Series
RoboClock™r
Specifications of CY7B991-7JC
Number Of Circuits
1
Package / Case
32-PLCC
Ratio - Input:output
8:8
Differential - Input:output
Yes/Yes
Input
3-State, TTL
Output
TTL
Frequency - Max
80MHz
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Frequency-max
80MHz
Output Frequency Range
3.75 MHz to 80 MHz
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1376
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7B991-7JC
Manufacturer:
CYPRESS
Quantity:
5 510
Company:
Part Number:
CY7B991-7JC
Manufacturer:
CYPRESS41
Quantity:
375
Company:
Part Number:
CY7B991-7JC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7B991-7JC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Switching Characteristics
Document #: 38-07138 Rev. **
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Parameter
NOM
RPWH
RPWL
U
SKEWPR
SKEW0
SKEW1
SKEW2
SKEW3
SKEW4
DEV
PD
ODCV
PWH
PWL
ORISE
OFALL
LOCK
JR
Operating Clock
Frequency in MHz
REF Pulse Width HIGH
REF Pulse Width LOW
Programmable Skew Unit
Zero Output Matched-Pair Skew
(XQ0, XQ1)
Zero Output Skew (All Outputs)
Output Skew (Rise-Rise, Fall-Fall, Same
Class Outputs)
Output Skew (Rise-Fall, Nominal-Inverted,
Divided-Divided)
Output Skew (Rise-Rise, Fall-Fall, Different
Class Outputs)
Output Skew (Rise-Fall, Nominal-Divided,
Divided-Inverted)
Device-to-Device Skew
Propagation Delay, REF Rise to FB Rise
Output Duty Cycle Variation
Output HIGH Time Deviation from 50%
Output LOW Time Deviation from 50%
Output Rise Time
Output Fall Time
PLL Lock Time
Cycle-to-Cycle Output
Jitter
[16, 17]
[16, 20]
[16, 20]
[26]
Description
[16, 20]
[23, 25]
[16, 20]
[23, 25]
Over the Operating Range
[14, 21]
FS = LOW
FS = MID
FS = HIGH
RMS
Peak-to-Peak
[22]
[14]
[16, 18]
[1, 2]
[1, 2]
[1, 2]
[23, 24]
[23, 24]
[14]
[2, 13]
Min.
–0.7
–1.2
0.15
0.15
5.0
5.0
15
25
40
(continued)
CY7B991–7
Typ.
0.1
0.3
0.6
1.0
0.7
1.2
0.0
0.0
1.5
1.5
Max.
+0.7
+1.2
0.25
0.75
1.65
200
1.0
1.5
1.2
1.7
3.5
2.5
2.5
0.5
30
50
80
25
3
See Table 1
Min.
–0.7
–1.5
5.0
5.0
0.5
0.5
15
25
40
CY7B992–7
Typ.
0.1
0.3
0.6
1.0
0.7
1.2
0.0
0.0
3.0
3.0
80
Max.
+0.7
+1.5
0.25
0.75
1.65
200
1.0
1.5
1.2
1.7
5.5
5.5
5.0
5.0
0.5
30
50
25
[15]
CY7B991
CY7B992
Page 8 of 15
MHz
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps