SY89873LMG Micrel Inc, SY89873LMG Datasheet - Page 2

• Manufacturer Part Number: SY89873LMG
• Description: IC CLK DVDR ANY DIFF-LVDS 16MLF
• Manufacturer: Micrel Inc
• Series: Precision Edge®r
• Type: Fanout Buffer (Distribution), Dividerr

Specifications of SY89873LMG

• Number Of Circuits: 1
• Ratio - Input:output: 1:3
• Differential - Input:output: Yes/Yes
• Input: CML, HSTL, LVDS, LVPECL
• Output: LVDS
• Frequency - Max: 2GHz
• Voltage - Supply: 2.97 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-MLF®, QFN
• Frequency-max: 2GHz
• Function: Clock Divider
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: MLF
• Pin Count: 16
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-1436

Micrel, Inc.
Notes:
1. On the next negative transition of the input signal.
2. Asynchronous Reset/Disable function. See "Timing Diagram."
M9999-082407
[e-mail] or [phone]
PACKAGE/ORDERING INFORMATION
/DISABLE
TRUTH TABLE
PIN DESCRIPTION
/QB0
/QB1
QB0
QB1
/RESET
Pin Number
1, 2, 3, 4
1
1
1
1
0
16, 15
7, 14
12, 9
16-Pin MLF
5, 6
10
11
13
1
2
3
4
8
16
5
15
6
S1
14
X
0
0
1
1
7
®
13
(MLF-16)
8
QB0, /QB0
QB1, /QB1
Pin Name
/DISABLE
VREF-AC
/RESET,
QA, /QA
S0, S1
IN, /IN
12
11
10
VCC
GND
9
VT
IN
/IN
VT
VREF-AC
S0
X
0
1
0
1
Pin Function
Differential Buffered Output Clocks: Divide by 2, 4, 8, 16.
LVDS compatible.
Differential Buffered Undivided Output Clock: LVDS compatible.
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors.
TTL/CMOS Compatible Output Reset and Disable: Internal 25kΩ pull-up. Input threshold
addition, when LOW, Banks A and B will be disabled.
Differential Input: Internal 50Ω termination resistors to V
See “Input Interface Applications” section.
Reference Voltage: Equal to V
Maximum sink/source current is 0.5mA. See “Input Interface Applications” section.
Termination Center-Tap: For CML and LVDS inputs, leave this pin floating. Otherwise,
see “Input Interface Applications” section.
Ground: Exposed pad is internally connected to GND and must be connected to a ground
plane for proper thermal operation.
Select Pins: LVTTL/CMOS logic levels. Internal 25kΩ pull-up resistor. Logic HIGH if left
unconnected (divided by 16 mode). S0 = LSB. Input threshold is V
is V
CC
Ordering Information
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
2. Tape and Reel.
3. Pb-Free package is recommended for new designs.
Part Number
SY89873LMI
SY89873LMITR
SY89873LMG
SY89873LMGTR
/2. Logic LOW will reset the divider select, and align Bank A and Bank B edges. In
QA = LOW, /QA = HIGH
Bank A Output
Input Clock
Input Clock
Input Clock
Input Clock
(3)
(2)
(2, 3)
2
Package Operating
CC
MLF-16
MLF-16
MLF-16
MLF-16
Type
–1.4V (approx.), and used for AC-coupled applications.
(1)
(1)
Industrial
Industrial
Industrial
Industrial
Range
QB0 = LOW, /QB0 = HIGH
QB1 = LOW, /QB1 = HIGH
Pb-Free bar line indicator
Pb-Free bar line indicator
T
input.
A
Bank B Outputs
Input Clock ÷ 16
Input Clock ÷ 2
Input Clock ÷ 4
Input Clock ÷ 8
= 25°C, DC Electricals only.
873L with
873L with
Package
Marking
873L
873L
CC
/2.
Precision Edge
SY89873L
(2)
(2)
Pb-Free
Pb-Free
NiPdAu
NiPdAu
Finish
Sn-Pb
Sb-Pb
Lead
®