AD9513BCPZ Analog Devices Inc, AD9513BCPZ Datasheet - Page 8

• Manufacturer Part Number: AD9513BCPZ
• Description: IC CLOCK DIST 3OUT PLL 32LFCSP
• Manufacturer: Analog Devices Inc
• Type: Fanout Buffer (Distribution), Dividerr

Specifications of AD9513BCPZ

• Number Of Circuits: 1
• Ratio - Input:output: 1:3
• Differential - Input:output: Yes/Yes
• Input: Differential
• Output: CMOS, LVDS
• Frequency - Max: 800MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Frequency-max: 800MHz
• No. Of Multipliers / Dividers: 3
• No. Of Amplifiers: 4
• Supply Voltage Range: 3.135V To 3.465V
• Slew Rate: 1V/ns
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• Package: 32LFCSP EP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9513/PCBZ - BOARD EVAL CLOCK 3CH AD9513
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD9513
CLOCK OUTPUT ADDITIVE TIME JITTER
Table 5.
Parameter
LVDS OUTPUT ADDITIVE TIME JITTER
CMOS OUTPUT ADDITIVE TIME JITTER
CLK= 400 MHz
CLK = 400 MHz
CLK = 400 MHz
CLK = 400 MHz
CLK = 400 MHz
CLK = 400 MHz
CLK = 400 MHz
CLK = 400 MHz
CLK = 400 MHz
CLK = 400 MHz
CLK = 400 MHz
CLK = 400 MHz
LVDS (OUT0) = 100 MHz
Divide Ratio = 4
LVDS (OUT0) = 100 MHz
Divide Ratio = 4
LVDS (OUT1) = 100 MHz
Divide Ratio = 4
LVDS (OUT0, OUT2) = 100 MHz
LVDS (OUT1) = 100 MHz
Divide Ratio = 4
LVDS (OUT0, OUT2) = 50 MHz
LVDS (OUT2) = 100 MHz
Divide Ratio = 4
LVDS (OUT0, OUT1) = 100 MHz
LVDS (OUT2) = 100 MHz
Divide Ratio = 4
LVDS (OUT0, OUT1) = 50 MHz
LVDS (OUT2) = 100 MHz
Divide Ratio = 4
CMOS (OUT0, OUT1) = 50 MHz
CMOS (OUT0) = 100 MHz
Divide Ratio = 4
LVDS (OUT2) = 100 MHz
CMOS (OUT0) = 100 MHz
Divide Ratio = 4
CMOS (OUT1, OUT2) = 50 MHz
CMOS (OUT1) = 100 MHz
Divide Ratio = 4
CMOS (OUT2) = 100 MHz
Divide Ratio = 4
CMOS (OUT0, OUT1) = 50 MHz
CMOS (OUT2) = 100 MHz
Divide Ratio = 4
LVDS (OUT0, OUT1) = 50 MHz
LVDS (OUT1, OUT2) = 100 MHz
LVDS (OUT1, OUT2) = 50 MHz
CMOS (OUT0, OUT2) = 50 MHz
Min
Typ
300
300
305
310
310
315
345
300
300
335
355
340
Rev. 0 | Page 8 of 28
Max
Unit
fs rms
fs rms
fs rms
fs rms
fs rms
fs rms
fs rms
fs rms
fs rms
fs rms
fs rms
fs rms
Test Conditions/Comments
Calculated from SNR of ADC method
Interferer
Interferer
Interferer
Interferer
Interferer
Interferer
Interferer
Calculated from SNR of ADC method
Interferer
Interferer
Interferer
Interferer
Interferer