MAX3676EHJ+T Maxim Integrated Products, MAX3676EHJ+T Datasheet - Page 9

• Manufacturer Part Number: MAX3676EHJ+T
• Description: IC CLOCK RECOVERY 32-TQFP
• Manufacturer: Maxim Integrated Products
• Type: Clock and Data Recovery (CDR)r

Specifications of MAX3676EHJ+T

• Input: PECL
• Output: PECL
• Frequency - Max: 622MHz
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP, 32-VQFP
• Frequency-max: 622MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The comparator is configured with an active-high LOP
output. An on-chip, 6kΩ pull-up resistor is provided to
reduce the external part count.
The MAX3676 is designed for both regenerator and
receiver applications. Its fully integrated PLL is a classic
second-order feedback system, with a loop bandwidth
(f
adjusted to set the loop damping. Figures 2 and 3 show
the open-loop and closed-loop transfer functions. The
PLL zero frequency, f
tor C
For an overdamped system (f
ing (M
ed by:
For example, using C
ing of 0.27dB. Reducing C
PLL instability. The recommended value for C
to guarantee a maximum jitter peaking of less than
0.1dB.
The MAX3676 is optimally designed to acquire lock and
to provide a bit-error rate (BER) of less than 10
long strings of consecutive zeros and ones. Measured
results show that the MAX3676 can tolerate 1200 con-
secutive ones or zeros. Decreasing C
number of tolerated consecutive identical zeros and
ones. C
type X7R or better.
The MAX3676’s LOL monitor indicates when the PLL is
locked. Under normal operation, the loop is locked and
the LOL output signal is high. When the MAX3676 loses
lock, a fast negative-edge transition occurs on LOL.
The output level remains at a low level (held by C
until the loop reacquires lock (Figure 4).
L
) fixed at 250kHz. The external capacitor, C
F
, and can be approximated according to:
P
) of a second-order system can be approximat-
F
must be a low-TC, high-quality capacitor of
M
Data-Retiming IC with Limiting Amplifier
_______________________________________________________________________________________
P
f
Z
Z
F
=
, is a function of external capaci-
=
= 0.22μF results in a jitter peak-
2
0log 1+
2
Setting the Loop Filter
F
π( )
below 0.22μF may result in
90 C
Z
⎛
⎜
⎝
1
622Mbps, 3.3V Clock-Recovery and
/f
L
) <0.25, the jitter peak-
F
f
f
Z
L
⎞
⎟
⎠
Lock Detect
F
reduces the
F
F
, can be
is 2.2μF
-10
LOL
for
)
Figure 2. Open-Loop Transfer Function
Figure 3. Closed-Loop Transfer Function
H(J2πf) (dB)
-3
0
C
f
Z
F
= 2.2μF
= 804Hz
100
100
1k
1k
C
C
10k
10k
F
f
F
Z
= 0.22μF
= 2.2μF
C
= 8.04kHz
F
= 0.22μF
100k
100k
1M
1M
10M
10M
f (kHz)
f (Hz)
9