SI5319C-C-GMR Silicon Laboratories Inc, SI5319C-C-GMR Datasheet - Page 17

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SI5319C-C-GMR

Manufacturer Part Number
SI5319C-C-GMR
Description
IC CLOCK MULT/ATTENUATOR 36QFN
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI5319C-C-GMR

Input
*
Output
*
Frequency - Max
*
Voltage - Supply
*
Operating Temperature
*
Mounting Type
Surface Mount
Package / Case
36-VFQFN Exposed Pad
Frequency-max
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Register
10
11
19
20
22
23
24
25
31
32
33
40
41
42
43
44
45
46
47
48
0
2
3
5
6
8
4. Register Map
All register bits that are not defined in this map should always be written with the specified Reset Values. The
writing to these bits of values other than the specified Reset Values may result in undefined device behavior. Do
not write to registers not listed in the register map, such as Register 64.
D7
ICMOS[1:0]
FREE_RUN
N1_HS[2:0]
N2_HS[2:0]
BWSEL_REG[3:0]
D6
ALWAYS_
CKOUT_
FREEZE
VCO_
ON
D5
HLOG[1:0]
SQ_ICAL
Rev. 1.0
D4
NC1_LS[15:8]
VALTIME[1:0]
NC1_LS[7:0]
N2_LS[15:8]
N2_LS[7:0]
N31[15:8]
N32[15:8]
N31[7:0]
N32[7:0]
D3
DSBL_ REG
D2
NC1_LS[19:16]
N2_LS[19:16]
SFOUT1_REG[2:0]
LOCK[T2:0]
N31[18:16]
N32[18:16]
LOS_MSK
BYPASS_
LOL_POL
LOL_PIN
REG
D1
Si5319
LOSX_MSK
LOL_MSK
INT_POL
INT_PIN
PD_CK
17
D0

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