XC6VSX475T-2FFG1156E Xilinx Inc, XC6VSX475T-2FFG1156E Datasheet - Page 5

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XC6VSX475T-2FFG1156E

Manufacturer Part Number
XC6VSX475T-2FFG1156E
Description
IC FPGA VIRTEX 1156FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™ 6 SXTr

Specifications of XC6VSX475T-2FFG1156E

Number Of Logic Elements/cells
476160
Number Of Labs/clbs
37200
Total Ram Bits
39223296
Number Of I /o
600
Number Of Gates
-
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1156-BBGA, FCBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
XC6VSX475T-2FFG1156I
XC6VSX475T-2FFG1156I

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Part Number
Manufacturer
Quantity
Price
Part Number:
XC6VSX475T-2FFG1156E
Manufacturer:
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Quantity:
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Part Number:
XC6VSX475T-2FFG1156E
Manufacturer:
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0
Power-On Power Supply Requirements
Xilinx FPGAs require a certain amount of supply current during power-on to insure proper device initialization. The actual
current consumed depends on the power-on ramp rate of the power supply.
Virtex-6 devices require a power-on sequence of V
V
V
down prior to V
Table 5
configuration. If the current minimums shown in
have passed through their power-on reset threshold voltages. The FPGA must be configured after V
Once initialized and configured, use the XPOWER tools to estimate current drain on these supplies.
Table 5: Power-On Current for Virtex-6 Devices
Table 6: Power Supply Ramp Time
DS152 (v3.2) April 1, 2011
Product Specification
Notes:
1.
2.
XC6VLX75T
XC6VLX130T
XC6VLX195T
XC6VLX240T
XC6VLX365T
XC6VLX550T
XC6VLX760
XC6VSX315T
XC6VSX475T
XC6VHX250T
XC6VHX255T
XC6VHX380T
XC6VHX565T
V
V
V
CCAUX
CCAUX
CCINT
CCO
CCAUX
Symbol
Typical values are specified at nominal voltage, 25°C.
Use the XPOWER™ Estimator (XPE) spreadsheet tool (download at http://www.xilinx.com/power) to calculate maximum power-on currents.
shows the minimum current, in addition to I
must always be powered prior to V
and V
CCO
CCAUX
Device
Internal supply voltage relative to GND
Output drivers supply voltage relative to GND
Auxiliary supply voltage relative to GND
are permitted to ramp simultaneously. Similarly, for the power-down sequence, V
or if power by the same supply, V
See I
See I
See I
See I
See I
See I
See I
See I
See I
See I
See I
See I
See I
CCO
CCINTQ
CCINTQ
CCINTQ
CCINTQ
CCINTQ
CCINTQ
CCINTQ
CCINTQ
CCINTQ
CCINTQ
CCINTQ
CCINTQ
CCINTQ
I
Description
CCINTMIN
Typ
. V
Table 4
CCAUX
(1)
CCINT
in
in
in
in
in
in
in
in
in
in
in
in
in
CCQ
Table 4
Table 4
Table 4
Table 4
Table 4
Table 4
Table 4
Table 4
Table 4
Table 4
Table 4
Table 4
Table 4
www.xilinx.com
, that are required by Virtex-6 devices for proper power-on and
CCAUX
and
, V
and V
Virtex-6 FPGA Data Sheet: DC and Switching Characteristics
CCAUX
Table 5
and V
CCO
, and V
can be powered by the same supply, therefore, both
I
I
I
I
I
I
I
I
I
I
I
I
I
CCO
CCAUXQ
CCAUXQ
CCAUXQ
CCAUXQ
CCAUXQ
CCAUXQ
CCAUXQ
CCAUXQ
CCAUXQ
CCAUXQ
CCAUXQ
CCAUXQ
CCAUXQ
are met, the device powers on after all three supplies
I
CCAUXMIN
Typ
CCO
power-down simultaneously.
(1)
+ 10
+ 10
+ 40
+ 40
+ 40
+ 40
+ 40
+ 40
+ 50
+ 40
+ 40
+ 40
+ 40
. If the requirement can not be met, then
I
I
I
I
I
I
I
I
I
I
I
I
I
CCOQ
CCOQ
CCOQ
CCOQ
CCOQ
CCOQ
CCOQ
CCOQ
CCOQ
CCOQ
CCOQ
CCOQ
CCOQ
Ramp Time
0.20 to 50.0
0.20 to 50.0
0.20 to 50.0
+ 30 mA per bank
+ 30 mA per bank
+ 30 mA per bank
+ 30 mA per bank
+ 30 mA per bank
+ 30 mA per bank
+ 30 mA per bank
+ 30 mA per bank
+ 30 mA per bank
+ 30 mA per bank
+ 30 mA per bank
+ 30 mA per bank
+ 30 mA per bank
I
CCOMIN
Typ
(1)
CCO
CCINT
must be powered
is applied.
Units
Units
ms
ms
ms
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
5

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