IP4337CX18/LF/P,13 NXP Semiconductors, IP4337CX18/LF/P,13 Datasheet

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IP4337CX18/LF/P,13

Manufacturer Part Number
IP4337CX18/LF/P,13
Description
IC LOW PASS FILTER 7CH 18WLCSP
Manufacturer
NXP Semiconductors
Series
-r
Datasheet

Specifications of IP4337CX18/LF/P,13

Resistance (ohms)
70
Capacitance
25pF
Power (watts)
0.25W, 1/4W
Package / Case
18-WLCSP
Resistance In Ohms
70
Tolerance
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Tolerance
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
934061969135
1. Product profile
1.1 General description
1.2 Features
1.3 Applications
The IP4337CX18/LF is a 7-channel RC low-pass filter array which is designed to provide
filtering of undesired RF signals in the 800 MHz to 3000 MHz frequency band. In addition,
the IP4337CX18/LF incorporates diodes to provide protection to downstream components
from ElectroStatic Discharge (ESD) voltages as high as 15 kV.
The IP4337CX18/LF is fabricated using monolithic silicon technology and integrates
7 resistors and 14 diodes in a single Wafer-Level Chip-Scale Package (WLCSP)
measuring 1.96 mm by 1.61 mm (typical). These features make the IP4337CX18/LF ideal
for use in applications requiring the utmost in miniaturization.
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IP4337CX18/LF
7-channel integrated filter network with ESD input protection
to IEC 61000-4-2 level 4
Rev. 02 — 20 August 2009
Pb-free, RoHS compliant and free of halogen and antimony (Dark Green compliant)
Integrated 7-channel -type RC filter network
70
Integrated ESD protection withstanding 15 kV contact discharge, far exceeding
IEC 61000-4-2 level 4
WLCSP with 0.4 mm pitch
Cellular and Personal Communication System (PCS) mobile handsets
Cordless telephones
Wireless data (WAN/LAN) systems
series resistance; 25 pF (typical) capacitance per line
Product data sheet

Related parts for IP4337CX18/LF/P,13

IP4337CX18/LF/P,13 Summary of contents

Page 1

IP4337CX18/LF 7-channel integrated filter network with ESD input protection to IEC 61000-4-2 level 4 Rev. 02 — 20 August 2009 1. Product profile 1.1 General description The IP4337CX18/ 7-channel RC low-pass filter array which is designed to provide ...

Page 2

... NXP Semiconductors 2. Pinning information 2.1 Pinning Fig 1. 2.2 Pin description Table 1. Pin A2 and A5 A1 and A4 B1 and B5 C2 and C5 C1 and C4 D2 and D5 D1 and D4 A3, B3, C3 and B4 3. Ordering information Table 2. Ordering information Type number Package Name IP4337CX18/LF WLCSP18 IP4337CX18LF_2 Product data sheet 7-channel integrated fi ...

Page 3

... NXP Semiconductors 4. Functional diagram Fig 2. 5. Limiting values Table 3. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol ESD tot T stg T reflow(peak) T amb [1] Device is qualified with 1000 pulses contact discharges each, according to the IEC 61000-4-2 model and far exceeds the specified level contact discharge). ...

Page 4

... NXP Semiconductors 6. Characteristics Table unless otherwise specified. amb Symbol Parameter R s(ch [1] Guaranteed by design. Table unless otherwise specified. amb Symbol Parameter il ct IP4337CX18LF_2 Product data sheet 7-channel integrated filter network with ESD input protection Channel characteristics Conditions channel series resistance (DC) ...

Page 5

... NXP Semiconductors 7. Application information 7.1 Insertion loss The insertion loss measurement configuration of a typical 50 system for evaluation of the IP4337CX18/LF is shown example, the insertion loss of channels between pins A2 and A5, A1 and A4, B1 and B5, C1 and C4 at frequencies GHz is displayed in The insertion loss is measured with a test PCB utilizing laser drilled micro-via holes that connect the PCB ground plane to the IP4337CX18/LF ground pins ...

Page 6

... NXP Semiconductors 7.2 Crosstalk The crosstalk measurement configuration of a typical 50 the IP4337CX18/LF is shown in The measured crosstalk within the IP4337CX18/ channel to another is shown in unused connections are terminated with 50 Fig 5. (dB) (1) Channels 1 and 2 (pins A2 and A4). (2) Channels 5 and 7 (pins C1 and D4). (3) Channels 5 and 1 (pins C1 and A5). ...

Page 7

... NXP Semiconductors 8. Package outline WLCSP18: wafer level chip-size package; 18 bumps; 1.96 x 1.61 x 0.61 mm bump A1 index area Dimensions Unit max 0.66 0.22 0.31 mm nom 0.61 0.20 0.41 0.26 min 0.56 0.18 0.21 Outline version IEC IP4337CX18/LF Fig 7. Package outline IP4337CX18/LF (WLCSP18) IP4337CX18LF_2 Product data sheet 7-channel integrated fi ...

Page 8

... NXP Semiconductors 9. Soldering of WLCSP packages 9.1 Introduction to soldering WLCSP packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering WLCSP (Wafer Level Chip-Size Packages) can be found in application note AN10439 “Wafer Level Chip Scale Package” and in application note AN10365 “Surface mount refl ...

Page 9

... NXP Semiconductors Fig 8. For further information on temperature profiles, refer to application note AN10365 “Surface mount reflow soldering description” . 9.3.1 Stand off The stand off between the substrate and the chip is determined by: • The amount of printed solder on the substrate • The size of the solder land on the substrate • ...

Page 10

... NXP Semiconductors Device removal can be done when the substrate is heated until it is certain that all solder joints are molten. The chip can then be carefully removed from the substrate without damaging the tracks and solder lands on the substrate. Removing the device must be done using plastic tweezers, because metal tweezers can damage the silicon. The surface of the substrate should be carefully cleaned and all solder and fl ...

Page 11

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 12

... NXP Semiconductors 14. Contents 1 Product profi 1.1 General description 1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 2.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 5 Limiting values Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Application information 7.1 Insertion loss . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.2 Crosstalk Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 9 Soldering of WLCSP packages ...

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