LE58QL02FJC Zarlink, LE58QL02FJC Datasheet - Page 48

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LE58QL02FJC

Manufacturer Part Number
LE58QL02FJC
Description
SLIC 4-CH 3.3V 44-Pin PLCC Tube
Manufacturer
Zarlink
Datasheet

Specifications of LE58QL02FJC

Package
44PLCC
Number Of Channels Per Chip
4
Minimum Operating Supply Voltage
3.135 V
Typical Operating Supply Voltage
3.3 V

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73h Read Revision Code Number (RCN)
This command returns an 8-bit number (RCN) describing the revision number of the QLSLAC device. The revision code of
the QLSLAC device will be 14h or higher. This command does not depend on the state of the Channel Enable Register.
80/81h Write/Read GX Filter Coefficients
Cxy = 0 or 1 in the command above corresponds to Cxy = +1 or −1, respectively, in the equation below.
The coefficient for the GX filter is defined as:
Power Up and Hardware Reset (RST) Values = A9F0 (Hex) (H
Note:
The default value is contained in a ROM register separate from the programmable coefficient RAM. There is a filter enable bit in Operating Func-
tions Register to switch between the default and programmed values.
82/83h Write/Read GR Filter Coefficients
Cxy = 0 or 1 in the command above corresponds to Cxy = +1 or −1, respectively, in the equation below.
The coefficient for the GR filter is defined as:
Power Up and Hardware Reset (RST) Values = 23A1 (Hex) (H
See note under Command 80/81h, above.
Command
I/O Data
Command
I/O Data Byte 1
I/O Data Byte 2
Command:
I/O Data Byte 1
I/O Data Byte 2
R/W = 0: Write
R/W = 1: Read
R/W = 0: Write
R/W = 1: Read
H
GR
=
C10 2
RCN7
m10
C40
C20
C40
C20
D
D
D
0
1
1
7
7
7
{
1
+
H
C20 2
GX
RCN6
D
D
D
1
0
0
=
6
6
6
Zarlink Semiconductor Inc.
1
+
m20
(
C10
RCN5
m40
m20
m40
m20
[
1
D
D
D
1
0
0
5
5
5
+
48
GX
GR
C30 2
2
= 1.995 (6 dB)).
= 0.35547 (–8.984 dB)).
m10
RCN4
D
D
D
1
0
0
{
4
4
4
1
m30
+
C20 2
(
1
RCN3
+
C30
C10
C30
C10
D
D
D
0
0
0
C40 2
3
3
3
m20
[
RCN2
1
m40
D
D
D
+
0
0
0
2
2
2
C30 2
)
]
}
RCN1
m30
m10
m30
m10
D
D
D
1
0
1
m30
1
1
1
(
1
+
RCN0
R/W
R/W
C40 2
D
D
D
1
0
0
0
m40
)
]
}

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