CAT5401WI-00-TE13 ON Semiconductor, CAT5401WI-00-TE13 Datasheet - Page 8

• Manufacturer Part Number: CAT5401WI-00-TE13
• Manufacturer: ON Semiconductor

Specifications of CAT5401WI-00-TE13

• Number Of Elements: 4
• # Of Taps: 64
• Resistance (max): 100KOhm
• Power Supply Requirement: Single
• Interface Type: Serial (SPI)
• Single Supply Voltage (typ): 3.3/5V
• Dual Supply Voltage (typ): Not RequiredV
• Single Supply Voltage (min): 2.5V
• Single Supply Voltage (max): 6V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / RoHS Status: Compliant

INSTRUCTION AND REGISTER
DESCRIPTION
DEVICE TYPE / ADDRESS BYTE
The first byte sent to the CAT5401 from the master/
processor is called the Device Address Byte. The most
significant four bits of the Device Type address are a
device type identifier. These bits for the CAT5401 are
fixed at 0101[B] (refer to Table 1).
The two least significant bits in the slave address byte,
A1 - A0, are the internal slave address and must match
the physical device address which is defined by the state
of the A1 - A0 input pins for the CAT5401 to successfully
continue the command sequence. Only the device which
slave address matches the incoming device address
sent by the master executes the instruction. The A1 - A0
inputs can be actively driven by CMOS input signals or
tied to V
address byte must be set to 0.
Table 1. Identification Byte Format
Table 2. Instruction Byte Format
Document No. 2010, Rev. F
CC
or V
(MSB)
(MSB)
ID3
I3
0
SS
. The remaining two bits in the device
ID2
I2
1
Device Type
Instruction
Identifier
Opcode
ID1
I1
0
ID0
I0
1
8
R1
INSTRUCTION BYTE
The next byte sent to the CAT5401 contains the instruction
and register pointer information. The four most significant
bits used provide the instruction opcode I [3:0]. The R1
and R0 bits point to one of the four data registers of each
associated potentiometer. The least two significant bits
point to one of four Wiper Control Registers. The format
is shown in Table 2.
Data Register Selection
0
Data Register Selected
Data Register
Selection
R0
DR0
DR1
DR2
DR3
0
Slave Address
WCR/Pot Selection
A1
P1
Characteristics subject to change without notice
R1
0
0
1
1
(LSB)
(LSB)
A0
P0
© Catalyst Semiconductor, Inc.
R0
0
1
0
1