LFX125EB-03F256I LATTICE SEMICONDUCTOR, LFX125EB-03F256I Datasheet - Page 22

• Manufacturer Part Number: LFX125EB-03F256I
• Description: FPGA ispXPGA® Family 139K Gates 1936 Cells EECMOS Technology 2.5V/3.3V 256-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LFX125EB-03F256I

• Package: 256FBGA
• Family Name: ispXPGA®
• Device Logic Units: 1936
• Device System Gates: 139000
• Number Of Registers: 3800
• Typical Operating Supply Voltage: 2.5|3.3 V
• Maximum Number Of User I/os: 160
• Ram Bits: 94208
• Re-programmability Support: Yes

Lattice Semiconductor
High Speed Serial Interface Block (sysHSI Block)
The High Speed Serial Interface (sysHSI) allows high speed serial data transfer over a pair of LVDS I/O. The
ispXPGA devices have multiple sysHSI blocks.
Each sysHSI block has two SERDES blocks which contain two main sub-blocks, Transmitter (with a serializer) and
Receiver (with a deserializer) including Clock/Data Recovery Circuit (CDR). Each SERDES can be used as a full
duplex channel. The two SERDES in sysHSI blocks share a common clock and must operate at the same nominal
frequency. Figure 20 shows the sysHSI block.
Device features support two data coding modes: 10B/12B and 8B/10B (for use with other encoding schemes, see
Lattice’s sysHSI technical notes). The encoding and decoding of the 10B/12B standard are performed within the
sysHSI block. For the 8B/10B standard, the symbol boundaries are aligned internally but the encoding and decod-
ing are performed outside the sysHSI block.
Each SERDES block receives a single high speed serial data input stream (with embedded clock) from an input,
and provide a low speed 10-bit wide data stream and a recovered clock to the device. For transmitting, SERDES
converts a 10-bit wide low-speed data stream to a single high-speed data stream with embedded clock for output.
Additionally, multiple sysHSI blocks can be grouped together to form a source synchronous interface of 1-10 chan-
nels.
For more information on the SERDES/CDR, refer to TN1020,
Figure 20. sysHSI Block Diagram
1.
“E-Series” does not support sysHSI.
sysIO
SS_CLKIN
SS_CLKOUT
SIN
SIN
SOUT
SOUT
Deserializer and Clock/Data Recovery
Deserializer and Clock/Data Recovery
SERDES(HSI#A)
SERDES(HSI#B)
CSPLL
Serializer
Serializer
18
sysHSI Usage
1
Guidelines.
ispXPGA Family Data Sheet
10
CSLOCK
10
RECCLK
RECCLK
10
10
CDRRST
CDRRST
SYDT
SYDT
REFCLK
TXD
RXD
RXD
TXD
CAL
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