ZT5524A1B Intel (CPU), ZT5524A1B Datasheet - Page 78

• Manufacturer Part Number: ZT5524A1B
• Manufacturer: Intel (CPU)

Specifications of ZT5524A1B

• Lead Free Status / RoHS Status: Supplier Unconfirmed

System Registers
B.1.8
B.1.9
78
Table 41. Video/LED Control Bit Descriptions
Table 42. HCINDEX Bit Descriptions
Intel NetStructure
Video/LED Control (E5h)
Address Offset
Default Value
Size
Attribute
HCINDEX - Host Control Index (E6h)
I/O Address
Reset
Default Value
Size
Attribute
Bit
7:3
2:0
7:5
3:2
1:0
Bit
4
Reserved - Reserved for future use.
Host Control Function Data Pointer - This register provides the address offset for the HCDATA
registers. This is the number listed in the HCINDEX Offset column in the Host Control Function
Register table (see
Reserved. These bits are reserved and should not be modified by the user.
Video Front/Rear Selection. This bit toggles video connection between the faceplate and the
backplane. This bit can be set in the BIOS setup screen. When this bit is set to logical 0, video is
connected to the faceplate connector J10. When this bit is set to logical 1, video is connected to J5 on
the rear panel.
User LED 1. These bits set the status of User LED 1.
Bit 3 affects the green LED as follows:
0=off
1=on
Bit 2 affects the amber LED as follows:
0=off
1=on
User LED 2. These bits set the status of User LED 2.
Bit 1 affects the green LED as follows:
0=off
1=on
Bit 0 affects the amber LED as follows:
0=off
1=on
®
ZT 5524 / MPCBL5524 High-Performance System Master Processor Board TPS
page
E5h
0x00
8 bits
WO
E6h
PCIRST
0x00
8 bits
R/W
79).
Description
Description