AD9430-LVDS/PCBZ Analog Devices Inc, AD9430-LVDS/PCBZ Datasheet - Page 8

• Manufacturer Part Number: AD9430-LVDS/PCBZ
• Manufacturer: Analog Devices Inc

Specifications of AD9430-LVDS/PCBZ

• Lead Free Status / RoHS Status: Compliant

AD9430
SWITCHING SPECIFICATIONS
AVDD = 3.3 V, DRVDD = 3.3 V, T
Table 4.
Parameter (Conditions)
Maximum Conversion Rate
Minimum Conversion Rate
CLK+ Pulse Width High (t
CLK+ Pulse Width Low (t
DS Input Setup Time (t
DS Input Hold Time (t
OUTPUT (CMOS Mode)
OUTPUT (LVDS Mode)
APERTURE DELAY (t
APERTURE UNCERTAINTY (Jitter, t
OUT OF RANGE RECOVERY TIME (CMOS and LVDS)
1
2
All ac specifications tested by differentially driving CLK+ and CLK−.
DS inputs used in CMOS mode only.
Valid Time (t
Propagation Delay (t
Rise Time (t
Fall Time (t
DCO Propagation Delay (t
Data to DCO Skew (t
Interleaved Mode (A, B Latency)
Parallel Mode (A, B Latency)
Valid Time (t
Propagation Delay (t
Rise Time (t
Fall Time (t
DCO Propagation Delay (t
Data to DCO Skew (t
Latency
F
F
R
) (20% to 80%)
R
) (20% to 80%)
) (20% to 80%)
) (20% to 80%)
V
V
)
)
A
)
HDS
SDS
PD
PD
PD
PD
)
EL
2
EH
)
)
)
to t
– t
)
2
1
1
)
1
1
CPD
CPD
CPD
CPD
)
)
)
)
J
)
MIN
= –40°C, T
MAX
= +85°C, unless otherwise noted.
Temp
Full
Full
Full
Full
Full
Full
Full
Full
25°C
25°C
Full
Full
Full
Full
Full
Full
25°C
25°C
Full
Full
Full
25°C
25°C
25°C
Rev. D | Page 8 of 44
Test
Level
IV
IV
V
V
IV
IV
VI
VI
V
V
VI
IV
V
V
V
VI
V
IV
IV
IV
IV
IV
IV
IV
Min
170
2
2
–0.5
1.75
2
–0.5
2.0
1.8
0.2
AD9430-170
Typ
3.8
1
1
3.8
0
14, 14
15, 14
3.2
0.5
0.5
2.7
0.5
14
1.2
0.25
Max
40
12.5
12.5
5
5
+0.5
4.3
3.8
0.8
1
Min
210
2
2
–0.5
1.75
2
–0.5
2.0
1.8
0.2
AD9430-210
Typ
0.5
1.2
0.25
3.8
1
1
3.8
0
14, 14
15, 14
3.2
0.5
2.7
0.5
14
Max
40
12.5
12.5
5
5
+0.5
4.3
3.8
0.8
1
Unit
MSPS
MSPS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Cycles
Cycles
ns
ns
ns
ns
ns
ns
Cycles
ns
ps rms
Cycles