AD9430-LVDS/PCBZ Analog Devices Inc, AD9430-LVDS/PCBZ Datasheet - Page 19

• Manufacturer Part Number: AD9430-LVDS/PCBZ
• Manufacturer: Analog Devices Inc

Specifications of AD9430-LVDS/PCBZ

• Lead Free Status / RoHS Status: Compliant

Figure 30. I
400
350
300
250
200
150
100
450
400
350
300
250
200
150
100
50
50
0
0
85
80
75
70
65
60
55
50
100
100
(A
10
ANALOG SUPPLY
CURRENT CMOS
MODE
IN
Figure 32. SINAD and SFDR vs. Clock Pulse Width High
OUTPUT SUPPLY
CURRENT LVDS
MODE
ANALOG SUPPLY
CURRENT LVDS MODE
= 10.3 MHz @ –0.5 dBFS), 210 MSPS Grade, C
AVDD
(A
120
20
120
IN
Figure 31. I
and I
= 10.3 MHz @ –0.5 dBFS, 170 MSPS, LVDS)
OUTPUT SUPPLY
CURRENT LVDS MODE
SNR
ENCODE POSITIVE DUTY CYCLE (%)
140
170 MSPS Grade, C
30
DRVDD
SINAD
140
SFDR
vs. Clock Rate (A
AVDD
ENCODE (MSPS)
ENCODE (MSPS)
OUTPUT SUPPLY
CURRENT CMOS MODE
160
40
ANALOG SUPPLY
CURRENT LVDS
MODE
and I
160
180
50
DRVDD
LOAD
ANALOG SUPPLY
CURRENT CMOS MODE
vs. Clock Rate
60
180
200
IN
OUTPUT SUPPLY
CURRENT CMOS
MODE
= 5 pF
= 10.3 MHz @ –0.5 dBFS)
70
220
200
LOAD
80
240
= 5 pF
220
80
60
40
20
0
90
90
80
70
60
50
40
30
20
10
0
Rev. D | Page 19 of 44
Figure 33. SNR, SINAD, and SFDR vs. ENCODE Pulse Width High,
–1.0
–2.0
–0.5
–1.5
80
75
70
65
60
55
50
1.4
1.2
1.0
0.8
0.6
0.4
0.2
2.0
1.5
1.0
0.5
0
0
–50
(A
20
0
IN
= 10.3 MHz @ –0.5 dBFS, 170 MSPS/210 MSPS, LVDS)
Figure 35. Full-Scale Gain Error vs. Temperature
(A
IN
–30
1
= 10.3 MHz @ –0.5 dBFS, 210 MSPS, LVDS)
30
R
ENCODE POSITIVE DUTY CYCLE (%)
O
SNR
–10
2
= 13 Ω TYP
Figure 34. V
40
TEMPERATURE (°C)
SINAD
3
SFDR
10
I
LOAD
REFOUT
50
4
(mA)
% GAIN ERROR
USING EXT REF
30
vs. I
5
LOAD
60
50
6
70
70
7
AD9430
90
80
95
8