STK12C68-W45 Cypress Semiconductor Corp, STK12C68-W45 Datasheet - Page 12

• Manufacturer Part Number: STK12C68-W45
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of STK12C68-W45

• Word Size: 8b
• Organization: 8Kx8
• Density: 64Kb
• Interface Type: Parallel
• Access Time (max): 45ns
• Operating Supply Voltage (typ): 5V
• Package Type: PDIP
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temp Range: 0C to 70C
• Pin Count: 28
• Mounting: Through Hole
• Supply Current: 65mA
• Lead Free Status / RoHS Status: Not Compliant

STK12C68, STK12C68-5 (SMD5962-94599)
Document Control #ML0008 Rev 2.0
BEST PRACTICES
nvSRAM products have been used effectively for
over 15 years. While ease-of-use is one of the
product’s main system values, experience gained
working with hundreds of applications has resulted
in the following suggestions as best practices:
• The non-volatile cells in an nvSRAM are pro-
• Power up boot firmware routines should rewrite
grammed on the test floor during final test and
quality assurance. Incoming inspection routines
at customer or contract manufacturer’s sites will
sometimes reprogram these values. Final NV
patterns are typically repeating patterns of AA,
55, 00, FF, A5, or 5A. End product’s firmware
should not assume an NV array is in a set pro-
grammed state. Routines that check memory
content values to determine first time system
configuration, cold or warm boot status, etc.
should always program a unique NV pattern
(e.g., complex 4-byte pattern of 46 E6 49 53 hex
or more random bytes) as part of the final sys-
tem manufacturing test to ensure these system
routines work consistently.
the nvSRAM into the desired state. While the
nvSRAM is shipped in a preset state, best prac-
tice is to again rewrite the nvSRAM into the
June, 2008
100
80
60
40
20
0
Figure 4: I
50
Cycle Time (ns)
100
cc
(max) Reads
150
TTL
CMOS
200
12
• The V
desired state as a safeguard against events that
might flip the bit inadvertently (program bugs,
incoming inspection routines, etc.).
includes a minimum and a maximum value size.
Best practice is to meet this requirement and not
exceed the max V
inrush currents may reduce the reliability of the
internal pass transistor. Customers that want to
use a larger V
extra store charge should discuss their V
selection with Simtek.
100
80
60
40
20
0
cap
value specified in this datasheet
Figure 5: I
50
cap
cap
value to make sure there is
Cycle Time (ns)
cc
100
value because the higher
(max) Writes
150
TTL
CMOS
200
cap
size