MT46H64M16LFCK-5:A Micron Technology Inc, MT46H64M16LFCK-5:A Datasheet - Page 79
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MT46H64M16LFCK-5:A
Manufacturer Part Number
MT46H64M16LFCK-5:A
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet
1.MT46H64M16LFCK-5A.pdf
(96 pages)
Specifications of MT46H64M16LFCK-5:A
Organization
64Mx16
Density
1Gb
Address Bus
14b
Access Time (max)
6.5/5ns
Maximum Clock Rate
200MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
130mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT46H64M16LFCK-5:A TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Figure 43: WRITE-to-PRECHARGE – Odd Number of Data, Interrupting
PDF: 09005aef82ce3074
1gb_ddr_mobile_sdram_t48m.pdf - Rev. L 04/10 EN
Command
Address
DQS
DQS
DQS
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
DM
DM
DM
DQ
DQ
DQ
CK#
5, 6
5, 6
5, 6
CK
1
7
6
7
6
7
6
WRITE
Bank a,
Col b
T0
Notes:
2
t
t
t
DQSS
DQSS
DQSS
1. An interrupted burst of 8 is shown; one data element is written.
2. A10 is LOW with the WRITE command (auto precharge is disabled).
3. PRE = PRECHARGE.
4.
5. DQS is required at T4 and T4n to register DM.
6. If a burst of 4 is used, DQS and DM are not required at T3, T3n, T4, and T4n.
7. D
D
b
IN
t
WR is referenced from the first positive CK edge after the last data-in pair.
NOP
D
IN
T1
b
IN
b = data-in for column b.
D
b
IN
T1n
NOP
T2
T2n
79
T3
NOP
1Gb: x16, x32 Mobile LPDDR SDRAM
t
WR
Micron Technology, Inc. reserves the right to change products or specifications without notice.
T3n
4
NOP
T4
Don’t Care
T4n
(a or all)
T5
PRE
Bank
© 2007 Micron Technology, Inc. All rights reserved.
3
WRITE Operation
Transitioning Data
T6
NOP