MT46H64M16LFCK-5:A Micron Technology Inc, MT46H64M16LFCK-5:A Datasheet - Page 78

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MT46H64M16LFCK-5:A

Manufacturer Part Number
MT46H64M16LFCK-5:A
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet

Specifications of MT46H64M16LFCK-5:A

Organization
64Mx16
Density
1Gb
Address Bus
14b
Access Time (max)
6.5/5ns
Maximum Clock Rate
200MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
130mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT46H64M16LFCK-5:A TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Figure 42: WRITE-to-PRECHARGE – Interrupting
PDF: 09005aef82ce3074
1gb_ddr_mobile_sdram_t48m.pdf - Rev. L 04/10 EN
Command
Address
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
DQS
DQS
DQS
DQ
DQ
DQ
CK#
DM
DM
DM
CK
1
5
6
5
6
5
6
WRITE
Bank a,
Col b
T0
Notes:
2
t
t
t
DQSS
DQSS
DQSS
1. An interrupted burst of 8 is shown; two data elements are written.
2. A10 is LOW with the WRITE command (auto precharge is disabled).
3. PRE = PRECHARGE.
4.
5. DQS is required at T4 and T4n to register DM.
6. D
D
b
IN
t
WR is referenced from the first positive CK edge after the last data-in pair.
NOP
T1
D
IN
b
IN
b = data-in for column b.
b + 1
D
D
b
IN
IN
T1n
b + 1
D
IN
b + 1
D
IN
NOP
T2
T2n
78
t
WR
NOP
T3
4
1Gb: x16, x32 Mobile LPDDR SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
T3n
(a or all)
PRE
T4
Bank
3
Don’t Care
T4n
T5
NOP
© 2007 Micron Technology, Inc. All rights reserved.
WRITE Operation
Transitioning Data
T6
NOP

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