MT47H64M8CF-25:F TR Micron Technology Inc, MT47H64M8CF-25:F TR Datasheet - Page 40
MT47H64M8CF-25:F TR
Manufacturer Part Number
MT47H64M8CF-25:F TR
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H64M8CF-25F_TR.pdf
(131 pages)
Specifications of MT47H64M8CF-25:F TR
Organization
64Mx8
Density
512Mb
Address Bus
16b
Access Time (max)
400ps
Maximum Clock Rate
800MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
205mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
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45. The half-clock of
46. ODT turn-on time
47. ODT turn-off time
48. Half-clock output parameters must be derated by the actual
49. The -187E maximum limit is 2 ×
50. Should use 8
amount of half-clock duty cycle error. For example, if the clock duty cycle was 47/53,
0.03, or 2.47, for
on time
is when the bus is in High-Z. Both are measured from
this will result in each parameter becoming larger. The parameter
ing both
both
t
ERR
t
AON (MAX) is when the ODT resistance is fully on. Both are measured from
t
ERR
5per
t
5per
(MIN) and
CK for backward compatibility.
t
t
(MAX) and
AOF (MIN) and 2.5 + 0.03, or 2.53, for
AOFD’s 2.5
t
t
AON (MIN) is when the device leaves High-Z and ODT resistance begins to turn on. ODT turn-
AOF (MIN) is when the device starts to turn off ODT resistance. ODT turn off time
t
JITdty (MIN).
t
t
JITdty (MAX). The parameter
CK assumes a 50/50 clock duty cycle. This half-clock value must be derated by the
t
CK +
t
AC (MAX) + 1000 but it will likely be 3 x
t
AOFD.
t
AOF (MAX).
t
AOF (MAX) is required to be derated by subtracting
t
ERR
5per
t
AOF (MIN) is required to be derated by subtract-
and
t
JITdty when input clock jitter is present;
t
CK +
t
AC (MAX) + 1000 in the future.
t
t
AOFD would actually be 2.5 -
AOND.
t
AOF (MAX)
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