SC16C850IET-S NXP Semiconductors, SC16C850IET-S Datasheet - Page 44

SC16C850IET-S

Manufacturer Part Number
SC16C850IET-S
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SC16C850IET-S

Transmitter And Receiver Fifo Counter
Yes
Data Rate
5Mbps
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Number Of Channels
1
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
SC16C850
Product data sheet
Fig 17. Receive timing in 16 mode
Fig 18. Receive timing in 68 mode
(1) INT is active when RX FIFO fills up to trigger level or a time-out condition happens (see
(2) INT is cleared when RX FIFO drops below trigger level.
(1) IRQ is active when RX FIFO fills up to trigger level or time-out condition happens (see
(2) IRQ is cleared when RX FIFO drops below trigger level.
CS (read)
INT
IRQ
(1)(2)
IOR
(1)(2)
RX
RX
start
start
bit
bit
All information provided in this document is subject to legal disclaimers.
D0
D0
2.5 to 3.3 V UART with 128-byte FIFOs and IrDA encoder/decoder
Rev. 2 — 11 November 2010
D1
D1
5 data bits
6 data bits
7 data bits
5 data bits
6 data bits
7 data bits
D2
D2
16 baud rate clock
16 baud rate clock
data bits (0 to 7)
data bits (0 to 7)
D3
D3
D4
D4
D5
D5
D6
D6
D7
D7
Section
Section
parity
parity
bit
bit
6.8).
6.8).
stop
t
t
stop
d(CS-IRQH)R
bit
d(IOR-INTL)
bit
SC16C850
next data
next data
start
t
start
t
bit
active
d(stop-INT)
active
d(stop-IRQL)
© NXP B.V. 2010. All rights reserved.
active
bit
active
002aac410
002aac633
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